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From: Julien Grall <julien@xen.org>
To: Michal Orzel <michal.orzel@arm.com>, xen-devel@lists.xenproject.org
Cc: Stefano Stabellini <sstabellini@kernel.org>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
	bertrand.marquis@arm.com
Subject: Re: [PATCH 5/9] arm/mm: Get rid of READ/WRITE_SYSREG32
Date: Thu, 22 Apr 2021 14:40:43 +0100	[thread overview]
Message-ID: <e2220e10-fcac-af61-f2ce-dbf514a02e9e@xen.org> (raw)
In-Reply-To: <3cee323f-7273-094f-150f-8f790a347d87@arm.com>



On 22/04/2021 12:47, Michal Orzel wrote:
> Hi Julien,

Hi Michal,

> On 20.04.2021 15:37, Julien Grall wrote:
>> Hi Michal,
>>
>> On 20/04/2021 08:08, Michal Orzel wrote:
>>> AArch64 system registers are 64bit whereas AArch32 ones
>>> are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
>>> we should get rid of helpers READ/WRITE_SYSREG32
>>> in favour of using READ/WRITE_SYSREG.
>>> We should also use register_t type when reading sysregs
>>> which can correspond to uint64_t or uint32_t.
>>> Even though many AArch64 sysregs have upper 32bit reserved
>>> it does not mean that they can't be widen in the future.
>>>
>>> Modify SCTLR_EL2 accesses to use READ/WRITE_SYSREG.
>>
>> SCTLR_EL2 already has bits defined in the range [32:63]. So this change is going to have a side effect as AFAICT head.S will not touch those bits. So they are now going to be preserved.
>>
>> The Arm Arm defines them as unknown if implemented. Therefore shouldn't we zero them somewhere else?
>>
> SCTLR_EL2 is set in head.S using SCTLR_EL2_SET which means that we are zeroing the upper 32bit half.

Ah! I couldn't find the place doing it. Thanks!

I think it is important to point in the commit message this is just a 
latent bug because the top 32-bit was not used by Xen. Can you update 
the commit message?

Cheers,

-- 
Julien Grall


  reply	other threads:[~2021-04-22 13:41 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-20  7:08 [PATCH 0/9] xen/arm64: Get rid of READ/WRITE_SYSREG32 Michal Orzel
2021-04-20  7:08 ` [PATCH 1/9] arm64/vfp: " Michal Orzel
2021-04-20 13:04   ` Julien Grall
2021-04-20  7:08 ` [PATCH 2/9] arm/domain: " Michal Orzel
2021-04-20 13:12   ` Julien Grall
2021-04-21  7:36     ` Michal Orzel
2021-04-21 10:20       ` Julien Grall
2021-04-20  7:08 ` [PATCH 3/9] arm/gic: " Michal Orzel
2021-04-20 13:28   ` Julien Grall
2021-04-21  7:48     ` Michal Orzel
2021-04-21 10:21       ` Julien Grall
2021-04-20  7:08 ` [PATCH 4/9] arm/p2m: " Michal Orzel
2021-04-20 13:31   ` Julien Grall
2021-04-20  7:08 ` [PATCH 5/9] arm/mm: " Michal Orzel
2021-04-20 13:37   ` Julien Grall
2021-04-22 11:47     ` Michal Orzel
2021-04-22 13:40       ` Julien Grall [this message]
2021-04-20  7:08 ` [PATCH 6/9] arm/page: " Michal Orzel
2021-04-21 15:11   ` Julien Grall
2021-04-20  7:08 ` [PATCH 7/9] arm/time,vtimer: " Michal Orzel
2021-04-21 16:01   ` Julien Grall
2021-04-20  7:08 ` [PATCH 8/9] arm: Change type of hsr to register_t Michal Orzel
2021-04-21 19:02   ` Julien Grall
2021-04-20  7:08 ` [PATCH 9/9] xen/arm64: Remove READ/WRITE_SYSREG32 helper macros Michal Orzel
2021-04-21 19:16   ` Julien Grall
2021-04-27  7:16     ` Michal Orzel
2021-04-27  8:30       ` Julien Grall

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