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From: "Zhang, Xiaolin" <xiaolin.zhang@intel.com>
To: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Cc: "intel-gvt-dev@lists.freedesktop.org"
	<intel-gvt-dev@lists.freedesktop.org>
Subject: Re: [PATCH v2 0/5] i915 pvmmio to improve GVTg performance
Date: Thu, 25 Oct 2018 01:53:21 +0000	[thread overview]
Message-ID: <073732E20AE4C540AE91DBC3F07D446086C27839@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: 1539934034-31343-1-git-send-email-xiaolin.zhang@intel.com

Would like to ask ping for review patch set v2. thanks very much.

BRs, Xiaolin


On 10/19/2018 03:27 PM, Zhang, Xiaolin wrote:
> To improve GVTg performance, it could reduce the mmio access trap
> numbers within guest driver in some certain scenarios since mmio
> access trap will introuduce vm exit/vm enter cost.
>
> the solution in this patch set is to setup a shared memory region
> which accessed both by guest and GVTg without trap cost. the shared
> memory region is allocated by guest driver and guest driver will
> pass the region's memory guest physical address to GVTg through
> PVINFO register and later GVTg can access this region directly without
> trap cost to achieve data exchange purpose between guest and GVTg.
>
> in this patch set, 3 kind of pvmmio optimization implemented which is
> controlled by enable_pvmmio PVINO register with different level flag.
> 1. workload submission (context submission): reduce 4 traps to 1 trap.
> 2. master irq: reduce 2 traps to 1 trap. 
> 3. ppgtt update: eliminate the cost of ppgtt write protection. 
>
> based on the experiment, the performance was gained 4 percent (average)
> improvment with regard to both media and 3D workload benchmarks.
>
> based on the pvmmio framework, it could achive more sceneario optimization
> such as globle GTT update, display plane and water mark update with guest.
>
> v0: RFC patch set
> v1: addressed RFC review comments
> v2: addressed v1 review comments, added pv callbacks for pv operations
>
> Xiaolin Zhang (5):
>   drm/i915: introduced pv capability for vgpu
>   drm/i915: get ready of memory for pvmmio
>   drm/i915: context submission pvmmio optimization
>   drm/i915: master irq pvmmio optimization
>   drm/i915: ppgtt update pvmmio optimization
>
>  drivers/gpu/drm/i915/i915_drv.c         |  2 +
>  drivers/gpu/drm/i915/i915_drv.h         | 15 +++++-
>  drivers/gpu/drm/i915/i915_gem_gtt.c     | 67 +++++++++++++++++++++++++
>  drivers/gpu/drm/i915/i915_irq.c         | 82 ++++++++++++++++++++++++++++--
>  drivers/gpu/drm/i915/i915_pvinfo.h      | 43 +++++++++++++++-
>  drivers/gpu/drm/i915/i915_vgpu.c        | 44 ++++++++++++++++-
>  drivers/gpu/drm/i915/intel_lrc.c        | 88 +++++++++++++++++++++++++++++++--
>  drivers/gpu/drm/i915/intel_ringbuffer.h |  3 ++
>  8 files changed, 333 insertions(+), 11 deletions(-)
>

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  parent reply	other threads:[~2018-10-25  1:53 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-19  7:27 [PATCH v2 0/5] i915 pvmmio to improve GVTg performance Xiaolin Zhang
2018-10-19  7:27 ` [PATCH v2 1/5] drm/i915: introduced pv capability for vgpu Xiaolin Zhang
2018-10-31  9:18   ` Zhang, Xiaolin
2018-10-19  7:27 ` [PATCH v2 2/5] drm/i915: get ready of memory for pvmmio Xiaolin Zhang
2018-10-31  9:18   ` Zhang, Xiaolin
2018-10-19  7:27 ` [PATCH v2 3/5] drm/i915: context submission pvmmio optimization Xiaolin Zhang
2018-10-31  9:18   ` Zhang, Xiaolin
2018-10-19  7:27 ` [PATCH v2 4/5] drm/i915: master irq " Xiaolin Zhang
2018-10-31  9:18   ` Zhang, Xiaolin
2018-10-19  7:27 ` [PATCH v2 5/5] drm/i915: ppgtt update " Xiaolin Zhang
2018-10-31  9:19   ` Zhang, Xiaolin
2018-10-22 10:00 ` ✗ Fi.CI.CHECKPATCH: warning for i915 pvmmio to improve GVTg performance Patchwork
2018-10-22 10:03 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-10-22 10:25 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-22 12:42 ` ✓ Fi.CI.IGT: " Patchwork
2018-10-25  1:53 ` Zhang, Xiaolin [this message]
2018-10-31 12:13 ` ✗ Fi.CI.BAT: failure for i915 pvmmio to improve GVTg performance (rev6) Patchwork

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