[PATCH 6/6] kvm/x86/mmu: include PT_PAGE_SIZE_MASK in PT64_PERM_MASK

From: Joerg Roedel <joerg.roedel@amd.com>
To: Avi Kivity <avi@redhat.com>, Marcelo Tosatti <mtosatti@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Joerg Roedel <joerg.roedel@amd.com>
Subject: [PATCH 6/6] kvm/x86/mmu: include PT_PAGE_SIZE_MASK in PT64_PERM_MASK
Date: Thu, 5 Mar 2009 13:12:33 +0100	[thread overview]
Message-ID: <1236255153-4432-7-git-send-email-joerg.roedel@amd.com> (raw)
In-Reply-To: <1236255153-4432-1-git-send-email-joerg.roedel@amd.com>

We also need to do a remote tlb flush if the PSE bit changes. The
pte_pfn should also change if this bit changes but we can't rely on
that. So check this bit too to be on the save side.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
 arch/x86/kvm/mmu.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 2a36f7f..055b181 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -121,7 +121,7 @@ module_param(oos_shadow, bool, 0644);
 	(PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
 
 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
-			| PT64_NX_MASK)
+			| PT64_NX_MASK | PT_PAGE_SIZE_MASK)
 
 #define PFERR_PRESENT_MASK (1U << 0)
 #define PFERR_WRITE_MASK (1U << 1)
-- 
1.5.6.4


