From: Kevin Hilman <khilman@deeprootsystems.com>
To: linux-omap@vger.kernel.org
Subject: [PATCH 64/86] [ARM] omap: Fix omap1 clock issues
Date: Thu, 12 Mar 2009 11:28:14 -0700 [thread overview]
Message-ID: <1236882516-29403-65-git-send-email-khilman@deeprootsystems.com> (raw)
In-Reply-To: <1236882516-29403-64-git-send-email-khilman@deeprootsystems.com>
From: Tony Lindgren <tony@atomide.com>
This fixes booting, and is a step toward fixing things properly:
- Make enable_reg u32 instead of u16
[rmk: virtual addresses are void __iomem *, not u32]
- Get rid of VIRTUAL_IO_ADDRESS for clocks
- Use __raw_read/write instead of omap_read/write for clock registers
This patch adds a bunch of compile warnings until omap1 clock
also uses offsets.
linux-omap source commit is 9d1dff8638c9e96a401e1885f9948662e9ff9636.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 77 +++++++++---------------------
arch/arm/mach-omap1/clock.h | 63 ++++++++++++-------------
arch/arm/plat-omap/include/mach/clock.h | 1 -
3 files changed, 53 insertions(+), 88 deletions(-)
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 7c45543..1e477af 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -163,7 +163,7 @@ static void omap1_watchdog_recalc(struct clk * clk)
static void omap1_uart_recalc(struct clk * clk)
{
- unsigned int val = omap_readl(clk->enable_reg);
+ unsigned int val = __raw_readl(clk->enable_reg);
if (val & clk->enable_bit)
clk->rate = 48000000;
else
@@ -517,14 +517,14 @@ static int omap1_set_uart_rate(struct clk * clk, unsigned long rate)
{
unsigned int val;
- val = omap_readl(clk->enable_reg);
+ val = __raw_readl(clk->enable_reg);
if (rate == 12000000)
val &= ~(1 << clk->enable_bit);
else if (rate == 48000000)
val |= (1 << clk->enable_bit);
else
return -EINVAL;
- omap_writel(val, clk->enable_reg);
+ __raw_writel(val, clk->enable_reg);
clk->rate = rate;
return 0;
@@ -543,8 +543,8 @@ static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate)
else
ratio_bits = (dsor - 2) << 2;
- ratio_bits |= omap_readw(clk->enable_reg) & ~0xfd;
- omap_writew(ratio_bits, clk->enable_reg);
+ ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd;
+ __raw_writew(ratio_bits, clk->enable_reg);
return 0;
}
@@ -583,8 +583,8 @@ static void omap1_init_ext_clk(struct clk * clk)
__u16 ratio_bits;
/* Determine current rate and ensure clock is based on 96MHz APLL */
- ratio_bits = omap_readw(clk->enable_reg) & ~1;
- omap_writew(ratio_bits, clk->enable_reg);
+ ratio_bits = __raw_readw(clk->enable_reg) & ~1;
+ __raw_writew(ratio_bits, clk->enable_reg);
ratio_bits = (ratio_bits & 0xfc) >> 2;
if (ratio_bits > 6)
@@ -646,25 +646,13 @@ static int omap1_clk_enable_generic(struct clk *clk)
}
if (clk->flags & ENABLE_REG_32BIT) {
- if (clk->flags & VIRTUAL_IO_ADDRESS) {
- regval32 = __raw_readl(clk->enable_reg);
- regval32 |= (1 << clk->enable_bit);
- __raw_writel(regval32, clk->enable_reg);
- } else {
- regval32 = omap_readl(clk->enable_reg);
- regval32 |= (1 << clk->enable_bit);
- omap_writel(regval32, clk->enable_reg);
- }
+ regval32 = __raw_readl(clk->enable_reg);
+ regval32 |= (1 << clk->enable_bit);
+ __raw_writel(regval32, clk->enable_reg);
} else {
- if (clk->flags & VIRTUAL_IO_ADDRESS) {
- regval16 = __raw_readw(clk->enable_reg);
- regval16 |= (1 << clk->enable_bit);
- __raw_writew(regval16, clk->enable_reg);
- } else {
- regval16 = omap_readw(clk->enable_reg);
- regval16 |= (1 << clk->enable_bit);
- omap_writew(regval16, clk->enable_reg);
- }
+ regval16 = __raw_readw(clk->enable_reg);
+ regval16 |= (1 << clk->enable_bit);
+ __raw_writew(regval16, clk->enable_reg);
}
return 0;
@@ -679,25 +667,13 @@ static void omap1_clk_disable_generic(struct clk *clk)
return;
if (clk->flags & ENABLE_REG_32BIT) {
- if (clk->flags & VIRTUAL_IO_ADDRESS) {
- regval32 = __raw_readl(clk->enable_reg);
- regval32 &= ~(1 << clk->enable_bit);
- __raw_writel(regval32, clk->enable_reg);
- } else {
- regval32 = omap_readl(clk->enable_reg);
- regval32 &= ~(1 << clk->enable_bit);
- omap_writel(regval32, clk->enable_reg);
- }
+ regval32 = __raw_readl(clk->enable_reg);
+ regval32 &= ~(1 << clk->enable_bit);
+ __raw_writel(regval32, clk->enable_reg);
} else {
- if (clk->flags & VIRTUAL_IO_ADDRESS) {
- regval16 = __raw_readw(clk->enable_reg);
- regval16 &= ~(1 << clk->enable_bit);
- __raw_writew(regval16, clk->enable_reg);
- } else {
- regval16 = omap_readw(clk->enable_reg);
- regval16 &= ~(1 << clk->enable_bit);
- omap_writew(regval16, clk->enable_reg);
- }
+ regval16 = __raw_readw(clk->enable_reg);
+ regval16 &= ~(1 << clk->enable_bit);
+ __raw_writew(regval16, clk->enable_reg);
}
}
@@ -745,17 +721,10 @@ static void __init omap1_clk_disable_unused(struct clk *clk)
}
/* Is the clock already disabled? */
- if (clk->flags & ENABLE_REG_32BIT) {
- if (clk->flags & VIRTUAL_IO_ADDRESS)
- regval32 = __raw_readl(clk->enable_reg);
- else
- regval32 = omap_readl(clk->enable_reg);
- } else {
- if (clk->flags & VIRTUAL_IO_ADDRESS)
- regval32 = __raw_readw(clk->enable_reg);
- else
- regval32 = omap_readw(clk->enable_reg);
- }
+ if (clk->flags & ENABLE_REG_32BIT)
+ regval32 = __raw_readl(clk->enable_reg);
+ else
+ regval32 = __raw_readw(clk->enable_reg);
if ((regval32 & (1 << clk->enable_bit)) == 0)
return;
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index ed343af..1b4dd05 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -165,7 +165,7 @@ static struct arm_idlect1_clk ck_dpll1out = {
.parent = &ck_dpll1,
.flags = CLOCK_IDLE_CONTROL |
ENABLE_REG_32BIT | RATE_PROPAGATES,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_CKOUT_ARM,
.recalc = &followparent_recalc,
},
@@ -177,7 +177,7 @@ static struct clk sossi_ck = {
.ops = &clkops_generic,
.parent = &ck_dpll1out.clk,
.flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_1,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1),
.enable_bit = 16,
.recalc = &omap1_sossi_recalc,
.set_rate = &omap1_set_sossi_rate,
@@ -200,7 +200,7 @@ static struct arm_idlect1_clk armper_ck = {
.ops = &clkops_generic,
.parent = &ck_dpll1,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
@@ -214,7 +214,7 @@ static struct clk arm_gpio_ck = {
.name = "arm_gpio_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_GPIOCK,
.recalc = &followparent_recalc,
};
@@ -225,7 +225,7 @@ static struct arm_idlect1_clk armxor_ck = {
.ops = &clkops_generic,
.parent = &ck_ref,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_XORPCK,
.recalc = &followparent_recalc,
},
@@ -238,7 +238,7 @@ static struct arm_idlect1_clk armtim_ck = {
.ops = &clkops_generic,
.parent = &ck_ref,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_TIMCK,
.recalc = &followparent_recalc,
},
@@ -251,7 +251,7 @@ static struct arm_idlect1_clk armwdt_ck = {
.ops = &clkops_generic,
.parent = &ck_ref,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_WDTCK,
.recalc = &omap1_watchdog_recalc,
},
@@ -274,7 +274,7 @@ static struct clk dsp_ck = {
.name = "dsp_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .enable_reg = (void __iomem *)ARM_CKCTL,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL),
.enable_bit = EN_DSPCK,
.rate_offset = CKCTL_DSPDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
@@ -296,7 +296,6 @@ static struct clk dspper_ck = {
.name = "dspper_ck",
.ops = &clkops_dspck,
.parent = &ck_dpll1,
- .flags = VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET,
@@ -309,7 +308,6 @@ static struct clk dspxor_ck = {
.name = "dspxor_ck",
.ops = &clkops_dspck,
.parent = &ck_ref,
- .flags = VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_XORPCK,
.recalc = &followparent_recalc,
@@ -319,7 +317,6 @@ static struct clk dsptim_ck = {
.name = "dsptim_ck",
.ops = &clkops_dspck,
.parent = &ck_ref,
- .flags = VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_DSPTIMCK,
.recalc = &followparent_recalc,
@@ -364,7 +361,7 @@ static struct clk l3_ocpi_ck = {
.name = "l3_ocpi_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
- .enable_reg = (void __iomem *)ARM_IDLECT3,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
.enable_bit = EN_OCPI_CK,
.recalc = &followparent_recalc,
};
@@ -373,7 +370,7 @@ static struct clk tc1_ck = {
.name = "tc1_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
- .enable_reg = (void __iomem *)ARM_IDLECT3,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
.enable_bit = EN_TC1_CK,
.recalc = &followparent_recalc,
};
@@ -382,7 +379,7 @@ static struct clk tc2_ck = {
.name = "tc2_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
- .enable_reg = (void __iomem *)ARM_IDLECT3,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
.enable_bit = EN_TC2_CK,
.recalc = &followparent_recalc,
};
@@ -408,7 +405,7 @@ static struct arm_idlect1_clk api_ck = {
.ops = &clkops_generic,
.parent = &tc_ck.clk,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_APICK,
.recalc = &followparent_recalc,
},
@@ -421,7 +418,7 @@ static struct arm_idlect1_clk lb_ck = {
.ops = &clkops_generic,
.parent = &tc_ck.clk,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_LBCK,
.recalc = &followparent_recalc,
},
@@ -446,7 +443,7 @@ static struct clk lcd_ck_16xx = {
.name = "lcd_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
@@ -460,7 +457,7 @@ static struct arm_idlect1_clk lcd_ck_1510 = {
.ops = &clkops_generic,
.parent = &ck_dpll1,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
@@ -477,7 +474,7 @@ static struct clk uart1_1510 = {
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 29, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
.recalc = &omap1_uart_recalc,
@@ -492,7 +489,7 @@ static struct uart_clk uart1_16xx = {
.rate = 48000000,
.flags = RATE_FIXED | ENABLE_REG_32BIT |
CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 29,
},
.sysc_addr = 0xfffb0054,
@@ -505,7 +502,7 @@ static struct clk uart2_ck = {
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 30, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
.recalc = &omap1_uart_recalc,
@@ -518,7 +515,7 @@ static struct clk uart3_1510 = {
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 31, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
.recalc = &omap1_uart_recalc,
@@ -533,7 +530,7 @@ static struct uart_clk uart3_16xx = {
.rate = 48000000,
.flags = RATE_FIXED | ENABLE_REG_32BIT |
CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 31,
},
.sysc_addr = 0xfffb9854,
@@ -545,7 +542,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
/* Direct from ULPD, no parent */
.rate = 6000000,
.flags = RATE_FIXED | ENABLE_REG_32BIT,
- .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL,
+ .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),
.enable_bit = USB_MCLK_EN_BIT,
};
@@ -555,7 +552,7 @@ static struct clk usb_hhc_ck1510 = {
/* Direct from ULPD, no parent */
.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
.flags = RATE_FIXED | ENABLE_REG_32BIT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = USB_HOST_HHC_UHOST_EN,
};
@@ -566,7 +563,7 @@ static struct clk usb_hhc_ck16xx = {
.rate = 48000000,
/* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
.flags = RATE_FIXED | ENABLE_REG_32BIT,
- .enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */,
+ .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */
.enable_bit = 8 /* UHOST_EN */,
};
@@ -576,7 +573,7 @@ static struct clk usb_dc_ck = {
/* Direct from ULPD, no parent */
.rate = 48000000,
.flags = RATE_FIXED,
- .enable_reg = (void __iomem *)SOFT_REQ_REG,
+ .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 4,
};
@@ -586,15 +583,15 @@ static struct clk mclk_1510 = {
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
.flags = RATE_FIXED,
- .enable_reg = (void __iomem *)SOFT_REQ_REG,
- .enable_bit = 6,
+ .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+ .enable_bit = 6,
};
static struct clk mclk_16xx = {
.name = "mclk",
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
- .enable_reg = (void __iomem *)COM_CLK_DIV_CTRL_SEL,
+ .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL),
.enable_bit = COM_ULPD_PLL_CLK_REQ,
.set_rate = &omap1_set_ext_clk_rate,
.round_rate = &omap1_round_ext_clk_rate,
@@ -613,7 +610,7 @@ static struct clk bclk_16xx = {
.name = "bclk",
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
- .enable_reg = (void __iomem *)SWD_CLK_DIV_CTRL_SEL,
+ .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL),
.enable_bit = SWD_ULPD_PLL_CLK_REQ,
.set_rate = &omap1_set_ext_clk_rate,
.round_rate = &omap1_round_ext_clk_rate,
@@ -627,7 +624,7 @@ static struct clk mmc1_ck = {
.parent = &armper_ck.clk,
.rate = 48000000,
.flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 23,
};
@@ -639,7 +636,7 @@ static struct clk mmc2_ck = {
.parent = &armper_ck.clk,
.rate = 48000000,
.flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 20,
};
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index cd69111..8705902 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -134,7 +134,6 @@ extern const struct clkops clkops_null;
#define RATE_PROPAGATES (1 << 2) /* Program children too */
/* bits 3-4 are free */
#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */
-#define VIRTUAL_IO_ADDRESS (1 << 6) /* Clock in virtual address */
#define CLOCK_IDLE_CONTROL (1 << 7)
#define CLOCK_NO_IDLE_PARENT (1 << 8)
#define DELAYED_APP (1 << 9) /* Delay application of clock */
--
1.6.1.2
next prev parent reply other threads:[~2009-03-12 18:33 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-03-12 18:27 [PATCH 00/86] OMAP2/3: clock sync with linux-omap Kevin Hilman
2009-03-12 18:27 ` [PATCH 01/86] [ARM] omap: remove VIRTUAL_CLOCK Kevin Hilman
2009-03-12 18:27 ` [PATCH 02/86] [ARM] omap: introduce clock operations structure Kevin Hilman
2009-03-12 18:27 ` [PATCH 03/86] [ARM] omap: provide a NULL " Kevin Hilman
2009-03-12 18:27 ` [PATCH 04/86] [ARM] omap: kill PARENT_CONTROLS_CLOCK Kevin Hilman
2009-03-12 18:27 ` [PATCH 05/86] [ARM] omap: add default .ops to all remaining OMAP2 clocks Kevin Hilman
2009-03-12 18:27 ` [PATCH 06/86] [ARM] omap: eliminate unnecessary conditionals in omap2_clk_wait_ready Kevin Hilman
2009-03-12 18:27 ` [PATCH 07/86] [ARM] omap: don't use clkops_omap2_dflt_wait for non-ICLK/FCLK clocks Kevin Hilman
2009-03-12 18:27 ` [PATCH 08/86] [ARM] omap: remove clk->owner Kevin Hilman
2009-03-12 18:27 ` [PATCH 09/86] [ARM] omap: rearrange clock.h structure order Kevin Hilman
2009-03-12 18:27 ` [PATCH 10/86] [ARM] omap: remove clk_deny_idle and clk_allow_idle Kevin Hilman
2009-03-12 18:27 ` [PATCH 11/86] [ARM] omap: provide a standard clk_get_parent() implementation Kevin Hilman
2009-03-12 18:27 ` [PATCH 12/86] [ARM] omap: move clock propagation into core omap clock code Kevin Hilman
2009-03-12 18:27 ` [PATCH 13/86] [ARM] omap: remove unnecessary calls to propagate_rate() Kevin Hilman
2009-03-12 18:27 ` [PATCH 14/86] [ARM] omap: move propagate_rate() calls into generic omap clock code Kevin Hilman
2009-03-12 18:27 ` [PATCH 15/86] [ARM] omap: handle RATE_CKCTL via .set_rate/.round_rate methods Kevin Hilman
2009-03-12 18:27 ` [PATCH 16/86] [ARM] omap: ensure devname is set for dummy devices Kevin Hilman
2009-03-12 18:27 ` [PATCH 17/86] [ARM] omap: allow double-registering of clocks Kevin Hilman
2009-03-12 18:27 ` [PATCH 18/86] [ARM] omap: convert OMAP1 to use clkdev Kevin Hilman
2009-03-12 18:27 ` [PATCH 19/86] [ARM] omap: convert OMAP2 " Kevin Hilman
2009-03-12 18:27 ` [PATCH 20/86] [ARM] omap: convert OMAP3 " Kevin Hilman
2009-03-12 18:27 ` [PATCH 21/86] [ARM] omap: remove pre-CLKDEV clk_get/clk_put Kevin Hilman
2009-03-12 18:27 ` [PATCH 22/86] [ARM] omap: provide a dummy clock node Kevin Hilman
2009-03-12 18:27 ` [PATCH 23/86] [ARM] omap: watchdog: convert clocks to match by devid and conid Kevin Hilman
2009-03-12 18:27 ` [PATCH 24/86] [ARM] omap: watchdog: provide a dummy ick for OMAP1 Kevin Hilman
2009-03-12 18:27 ` [PATCH 25/86] [ARM] omap: MMC: convert clocks to match by devid and conid Kevin Hilman
2009-03-12 18:27 ` [PATCH 26/86] [ARM] omap: MMC: provide a dummy ick for OMAP1 Kevin Hilman
2009-03-12 18:27 ` [PATCH 27/86] [ARM] omap: mcspi: new short connection id names Kevin Hilman
2009-03-12 18:27 ` [PATCH 28/86] [ARM] omap: mcbsp: convert to use fck/ick clocks directly Kevin Hilman
2009-03-12 18:27 ` [PATCH 29/86] [ARM] omap: i2c: use short connection ids Kevin Hilman
2009-03-12 18:27 ` [PATCH 30/86] [ARM] omap: i2c: remove armxor_ck Kevin Hilman
2009-03-12 18:27 ` [PATCH 31/86] [ARM] omap: i2c: remove conditional ick clocks Kevin Hilman
2009-03-12 18:27 ` [PATCH 32/86] [ARM] omap: w1: convert omap HDQ clocks to match by devid and conid Kevin Hilman
2009-03-12 18:27 ` [PATCH 33/86] [ARM] omap: spi: arrange for omap_uwire to use connection ID Kevin Hilman
2009-03-12 18:27 ` [PATCH 34/86] [ARM] omap: convert omap RNG clocks to match by devid and conid Kevin Hilman
2009-03-12 18:27 ` [PATCH 35/86] [ARM] omap: omap24xxcam: use short connection IDs for omap2 clocks Kevin Hilman
2009-03-12 18:27 ` [PATCH 36/86] [ARM] omap: hsmmc: new short connection id names Kevin Hilman
2009-03-12 18:27 ` [PATCH 37/86] [ARM] OMAP2/3: Add non-CORE DPLL rate set code and M, N programming Kevin Hilman
2009-03-12 18:27 ` [PATCH 38/86] [ARM] OMAP: Fix sparse, checkpatch warnings in OMAP2/3 PRCM/PM code Kevin Hilman
2009-03-12 18:27 ` [PATCH 39/86] [ARM] OMAP24xx clock: add missing SSI L4 interface clock Kevin Hilman
2009-03-12 18:27 ` [PATCH 40/86] [ARM] OMAP3: move USBHOST SAR handling from clock framework to powerdomain layer Kevin Hilman
2009-03-12 18:27 ` [PATCH 41/86] [ARM] OMAP3 clock: fix 96MHz clocks Kevin Hilman
2009-03-12 18:27 ` [PATCH 42/86] [ARM] OMAP2: Fix definition of SGX clock register bits Kevin Hilman
2009-03-12 18:27 ` [PATCH 43/86] [ARM] OMAP: Add CSI2 clock struct for handling it with clock API Kevin Hilman
2009-03-12 18:27 ` [PATCH 44/86] [ARM] OMAP: Make dpll4_m4_ck programmable with clk_set_rate() Kevin Hilman
2009-03-12 18:27 ` [PATCH 45/86] [ARM] OMAP2: Implement CPUfreq frequency table based on PRCM table Kevin Hilman
2009-03-12 18:27 ` [PATCH 46/86] [ARM] OMAP2/3 clockdomains: combine pwrdm, pwrdm_name into union in struct clockdomain Kevin Hilman
2009-03-12 18:27 ` [PATCH 47/86] [ARM] OMAP2/3 clockdomains: add CM and PRM clkdms Kevin Hilman
2009-03-12 18:27 ` [PATCH 48/86] [ARM] OMAP3 clock: move sys_clkout2 clk to core_clkdm Kevin Hilman
2009-03-12 18:27 ` [PATCH 49/86] [ARM] OMAP3 PRCM: add DPLL1-5 powerdomains, clockdomains; mark clocks Kevin Hilman
2009-03-12 18:28 ` [PATCH 50/86] [ARM] OMAP3 powerdomains: remove RET from SGX power states list Kevin Hilman
2009-03-12 18:28 ` [PATCH 51/86] [ARM] OMAP: wait for pwrdm transition after clk_enable() Kevin Hilman
2009-03-12 18:28 ` [PATCH 52/86] [ARM] OMAP2/3 clockdomains: autodeps should respect platform flags Kevin Hilman
2009-03-12 18:28 ` [PATCH 53/86] [ARM] OMAP3: PM: Emu_pwrdm is switched off by hardware even when sdti is in use Kevin Hilman
2009-03-12 18:28 ` [PATCH 54/86] [ARM] OMAP3 clock: fix DPLL jitter correction and rate programming Kevin Hilman
2009-03-12 18:28 ` [PATCH 55/86] [ARM] OMAP3 clock: DPLL{1,2}_FCLK clksel can divide by 4 Kevin Hilman
2009-03-12 18:28 ` [PATCH 56/86] [ARM] OMAP3 clock: convert dpll_data.idlest_bit to idlest_mask Kevin Hilman
2009-03-12 18:28 ` [PATCH 57/86] [ARM] OMAP3 clock: remove unnecessary dpll_data dereferences Kevin Hilman
2009-03-12 18:28 ` [PATCH 58/86] [ARM] OMAP3 clock: optimize DPLL rate rounding algorithm Kevin Hilman
2009-03-12 18:28 ` [PATCH 59/86] [ARM] OMAP3 clock: avoid invalid FREQSEL values during DPLL rate rounding Kevin Hilman
2009-03-12 18:28 ` [PATCH 60/86] [ARM] OMAP3 clock: disable DPLL autoidle while waiting for DPLL to lock Kevin Hilman
2009-03-12 18:28 ` [PATCH 61/86] [ARM] OMAP2/3 clock: clean up mach-omap2/clock.c Kevin Hilman
2009-03-12 18:28 ` [PATCH 62/86] [ARM] OMAP34XX: Add miscellaneous definitions related to 34xx Kevin Hilman
2009-03-12 18:28 ` [PATCH 63/86] [ARM] OMAP2 PRCM: clean up CM_IDLEST bits Kevin Hilman
2009-03-12 18:28 ` Kevin Hilman [this message]
2009-03-12 18:28 ` [PATCH 65/86] [ARM] OMAP2 SDRC: move mach-omap2/memory.h into mach/sdrc.h Kevin Hilman
2009-03-12 18:28 ` [PATCH 66/86] [ARM] OMAP2 SDRC: rename memory.c to sdrc2xxx.c Kevin Hilman
2009-03-12 18:28 ` [PATCH 67/86] [ARM] OMAP2 SDRC: separate common OMAP2/3 code from OMAP2xxx code Kevin Hilman
2009-03-12 18:28 ` [PATCH 68/86] [ARM] OMAP2 SDRC: add SDRAM timing parameter infrastructure Kevin Hilman
2009-03-12 18:28 ` [PATCH 69/86] [ARM] OMAP3 clock: add omap3_core_dpll_m2_set_rate() Kevin Hilman
2009-03-12 18:28 ` [PATCH 70/86] [ARM] OMAP3: PM: Make sure clk_disable_unused() order is correct Kevin Hilman
2009-03-12 18:28 ` [PATCH 71/86] [ARM] OMAP2/3 clock: use standard set_rate fn in omap2_clk_arch_init() Kevin Hilman
2009-03-12 18:28 ` [PATCH 72/86] [ARM] omap: clks: call recalc after any rate change Kevin Hilman
2009-03-12 18:28 ` [PATCH 73/86] [ARM] omap: create a proper tree of clocks Kevin Hilman
2009-03-12 18:28 ` [PATCH 74/86] [ARM] OMAP2/3 clock: don't use a barrier after clk_disable() Kevin Hilman
2009-03-12 18:28 ` [PATCH 75/86] [ARM] OMAP2xxx clock: consolidate DELAYED_APP clock commits; fix barrier Kevin Hilman
2009-03-12 18:28 ` [PATCH 76/86] [ARM] OMAP2/3 clock: convert remaining MPU barriers into OCP barriers Kevin Hilman
2009-03-12 18:28 ` [PATCH 77/86] [ARM] OMAP clock: drop clk_get_usecount() Kevin Hilman
2009-03-12 18:28 ` [PATCH 78/86] [ARM] omap: fix usecount decrement bug Kevin Hilman
2009-03-12 18:28 ` [PATCH 79/86] [ARM] omap: fix clockdomain enable/disable ordering Kevin Hilman
2009-03-12 18:28 ` [PATCH 80/86] [ARM] OMAP2/3 clock: don't tinker with hardirqs when they are supposed to be disabled Kevin Hilman
2009-03-12 18:28 ` [PATCH 81/86] [ARM] omap: arrange for clock recalc methods to return the rate Kevin Hilman
2009-03-12 18:28 ` [PATCH 82/86] [ARM] omap: add support for bypassing DPLLs Kevin Hilman
2009-03-12 18:28 ` [PATCH 83/86] [ARM] OMAP3: update ES level flags to discriminate between post-ES2 revisions Kevin Hilman
2009-03-12 18:28 ` [PATCH 84/86] [ARM] OMAP3 powerdomains: make USBTLL SAR only available on ES3.1 and beyond Kevin Hilman
2009-03-12 18:28 ` [PATCH 85/86] [ARM] omap: ensure that failing power domain lookups produce errors Kevin Hilman
2009-03-12 18:28 ` [PATCH 86/86] [ARM] omap: clk_set_parent: deny changing parent if clock is enabled Kevin Hilman
2009-03-12 20:39 ` [PATCH 38/86] [ARM] OMAP: Fix sparse, checkpatch warnings in OMAP2/3 PRCM/PM code Pandita, Vikram
2009-03-12 21:32 ` Kevin Hilman
2009-03-16 18:06 ` [PATCH 00/86] OMAP2/3: clock sync with linux-omap Kevin Hilman
2009-03-19 8:57 ` Paul Walmsley
2009-03-19 16:04 ` Tony Lindgren
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1236882516-29403-65-git-send-email-khilman@deeprootsystems.com \
--to=khilman@deeprootsystems.com \
--cc=linux-omap@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.