From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 7/7] drm/i915: make sure panel is sequenced off when starting a mode set
Date: Wed, 8 Sep 2010 12:42:05 -0700 [thread overview]
Message-ID: <1283974925-2913-8-git-send-email-jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <1283974925-2913-1-git-send-email-jbarnes@virtuousgeek.org>
Otherwise we may not be able to train the DP link.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/intel_dp.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3836f1f..0115039 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -894,6 +894,7 @@ static void intel_dp_prepare(struct drm_encoder *encoder)
uint32_t dp_reg = I915_READ(intel_dp->output_reg);
if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) {
+ ironlake_edp_panel_off(dev);
ironlake_edp_backlight_off(dev);
ironlake_edp_panel_vdd_on(dev);
ironlake_edp_pll_on(encoder);
--
1.6.3.3
next prev parent reply other threads:[~2010-09-08 19:42 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-09-08 19:41 eDP fixes Jesse Barnes
2010-09-08 19:41 ` [PATCH 1/7] drm/i915: fix eDP detection Jesse Barnes
2010-09-08 19:42 ` [PATCH 2/7] drm/i915: use 125MHz reference clock for PCH attached eDP Jesse Barnes
2010-09-08 19:42 ` [PATCH 3/7] drm/i915: use VDD AUX for panel power around detection and in prepare Jesse Barnes
2010-09-08 19:42 ` [PATCH 4/7] drm/i915: split DP link training across panel power sequencing Jesse Barnes
2010-09-08 19:42 ` [PATCH 5/7] drm/i915: don't change VDD AUX status in panel power functions Jesse Barnes
2010-09-08 19:42 ` [PATCH 6/7] drm/i915: make sure VDD AUX power has time to settle Jesse Barnes
2010-09-08 19:42 ` Jesse Barnes [this message]
2010-09-08 20:11 ` [PATCH 7/7] drm/i915: make sure panel is sequenced off when starting a mode set Chris Wilson
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