Re: [PATCH 0/3] OMAP: DSS2: Generalize DSS clock source names

From: Tomi Valkeinen <tomi.valkeinen@ti.com>
To: "Taneja, Archit" <archit@ti.com>
Cc: "linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>
Subject: Re: [PATCH 0/3] OMAP: DSS2: Generalize DSS clock source names
Date: Mon, 28 Feb 2011 14:29:35 +0200	[thread overview]
Message-ID: <1298896175.9809.33.camel@deskari> (raw)
In-Reply-To: <1298875837-6305-1-git-send-email-archit@ti.com>

Hi,

On Mon, 2011-02-28 at 00:50 -0600, Taneja, Archit wrote:
> The OMAP Display Subsystem has multiple clock sources available for its
> modules. One of these sources has to be selected through a global control
> register called DSS_CTRL.
> 
> For example, on OMAP4, the Display Controller Module's (DISPC) functional
> clock can be derived from:
> a) output of DPLL_PER's M5 divisor
> b) output of DSI1 PLL's M4 divisor
> c) output of DSI2 PLL's M4 divisor
> d) output of HDMI PLL
> 
> There is, hence, an enum called 'dss_clk_source' which is used throughout
> DSS2, to select clock sources for various DSS sub modules. These clock
> source names are currently specific to OMAP2/3 TRM clock names.
> 
> All enum members, variables, functions which are based on these clock
> source names have been made generic such that they can be used for future
> OMAPs as well.
> 
> Archit Taneja (3):
>   OMAP2PLUS: DSS2: Make members of dss_clk_source generic
>   OMAP2PLUS: DSS2: Use dss features to get clock source names of
>     current OMAP
>   OMAP2PLUS: DSS2: DSI: Generalize DSI PLL Clock Naming

This patch set, and also the two individual patches for using
dss_features, look ok. However, they don't apply to DSS tree. Can you
rebase these on top of DSS master branch, please?

 Tomi