From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 16/16] drm/i915: ring support for Ivy Bridge
Date: Tue, 26 Apr 2011 16:38:54 -0700 [thread overview]
Message-ID: <1303861134-8762-17-git-send-email-jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <1303861134-8762-1-git-send-email-jbarnes@virtuousgeek.org>
Use Sandy Bridge paths in a few places.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index f15d80f..9bcfb9b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -287,7 +287,7 @@ static int init_render_ring(struct intel_ring_buffer *ring)
if (INTEL_INFO(dev)->gen > 3) {
int mode = VS_TIMER_DISPATCH << 16 | VS_TIMER_DISPATCH;
- if (IS_GEN6(dev))
+ if (IS_GEN6(dev) || IS_GEN7(dev))
mode |= MI_FLUSH_ENABLE << 16 | MI_FLUSH_ENABLE;
I915_WRITE(MI_MODE, mode);
}
@@ -553,7 +553,7 @@ render_ring_put_irq(struct intel_ring_buffer *ring)
void intel_ring_setup_status_page(struct intel_ring_buffer *ring)
{
drm_i915_private_t *dev_priv = ring->dev->dev_private;
- u32 mmio = IS_GEN6(ring->dev) ?
+ u32 mmio = (IS_GEN6(ring->dev) || IS_GEN7(ring->dev)) ?
RING_HWS_PGA_GEN6(ring->mmio_base) :
RING_HWS_PGA(ring->mmio_base);
I915_WRITE(mmio, (u32)ring->status_page.gfx_addr);
@@ -1335,7 +1335,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
drm_i915_private_t *dev_priv = dev->dev_private;
struct intel_ring_buffer *ring = &dev_priv->ring[VCS];
- if (IS_GEN6(dev))
+ if (IS_GEN6(dev) || IS_GEN7(dev))
*ring = gen6_bsd_ring;
else
*ring = bsd_ring;
--
1.7.4.1
next prev parent reply other threads:[~2011-04-26 23:54 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-04-26 23:38 Initial Ivy Bridge support Jesse Barnes
2011-04-26 23:38 ` [PATCH 01/16] drm/i915: make FDI training a display function Jesse Barnes
2011-04-27 15:58 ` Ben Widawsky
2011-04-27 20:51 ` Jesse Barnes
2011-04-26 23:38 ` [PATCH 02/16] drm/i915: split irq handling into per-chipset functions Jesse Barnes
2011-04-26 23:38 ` [PATCH 03/16] drm/i915: split enable/disable vblank code into chipset specific functions Jesse Barnes
2011-04-26 23:38 ` [PATCH 04/16] drm/i915: add Ivy Bridge PCI IDs and flags Jesse Barnes
2011-04-27 6:59 ` Chris Wilson
2011-04-27 21:01 ` Jesse Barnes
2011-04-27 21:28 ` Chris Wilson
2011-04-27 7:23 ` Chris Wilson
2011-04-27 21:02 ` Jesse Barnes
2011-04-26 23:38 ` [PATCH 05/16] drm/i915: add IS_GEN7 macro to cover Ivy Bridge and later Jesse Barnes
2011-04-26 23:38 ` [PATCH 06/16] agp/intel: add Ivy Bridge support Jesse Barnes
2011-04-26 23:38 ` [PATCH 07/16] drm/i915: add PantherPoint PCH ID Jesse Barnes
2011-04-27 15:05 ` Keith Packard
2011-04-27 21:13 ` Jesse Barnes
2011-04-26 23:38 ` [PATCH 08/16] drm/i915: Ivy Bridge has split display and pipe control Jesse Barnes
2011-04-27 7:19 ` Chris Wilson
2011-04-27 20:02 ` Daniel Vetter
2011-04-27 21:03 ` Jesse Barnes
2011-04-26 23:38 ` [PATCH 09/16] drm/i915: add swizzle/tiling support for Ivy Bridge Jesse Barnes
2011-04-26 23:38 ` [PATCH 10/16] drm/i915: automatic FDI training " Jesse Barnes
2011-04-26 23:38 ` [PATCH 11/16] drm/i915: manual FDI training " Jesse Barnes
2011-04-27 15:10 ` Keith Packard
2011-04-27 21:13 ` Jesse Barnes
2011-04-26 23:38 ` [PATCH 12/16] drm/i915: treat Ivy Bridge watermarks like Sandy Bridge Jesse Barnes
2011-04-26 23:38 ` [PATCH 13/16] drm/i915: interrupt & vblank support for Ivy Bridge Jesse Barnes
2011-04-26 23:38 ` [PATCH 14/16] drm/i915: page flip " Jesse Barnes
2011-04-26 23:38 ` [PATCH 15/16] drm/i915: untested DP " Jesse Barnes
2011-04-26 23:38 ` Jesse Barnes [this message]
2011-04-26 23:52 ` Initial Ivy Bridge support Jesse Barnes
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