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From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 03/19] drm/i915: split enable/disable vblank code into chipset specific functions
Date: Thu, 28 Apr 2011 15:12:49 -0700	[thread overview]
Message-ID: <1304028785-10583-4-git-send-email-jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <1304028785-10583-1-git-send-email-jbarnes@virtuousgeek.org>

This makes the Ironlake+ code trivial and generally simplifies things.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_dma.c |    4 +++
 drivers/gpu/drm/i915/i915_drv.h |    2 +
 drivers/gpu/drm/i915/i915_irq.c |   42 ++++++++++++++++++++++++++++----------
 3 files changed, 37 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 2f653c2..d124f0e 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1258,11 +1258,15 @@ static int i915_load_modeset_init(struct drm_device *dev)
 		dev->driver->irq_preinstall = ironlake_irq_preinstall;
 		dev->driver->irq_postinstall = ironlake_irq_postinstall;
 		dev->driver->irq_uninstall = ironlake_irq_uninstall;
+		dev->driver->enable_vblank = ironlake_enable_vblank;
+		dev->driver->disable_vblank = ironlake_disable_vblank;
 	} else {
 		dev->driver->irq_preinstall = i915_driver_irq_preinstall;
 		dev->driver->irq_postinstall = i915_driver_irq_postinstall;
 		dev->driver->irq_uninstall = i915_driver_irq_uninstall;
 		dev->driver->irq_handler = i915_driver_irq_handler;
+		dev->driver->enable_vblank = i915_enable_vblank;
+		dev->driver->disable_vblank = i915_disable_vblank;
 	}
 
 	ret = drm_irq_install(dev);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4841901..4dfe3fa 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1036,6 +1036,8 @@ extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
 				struct drm_file *file_priv);
 extern int i915_enable_vblank(struct drm_device *dev, int crtc);
 extern void i915_disable_vblank(struct drm_device *dev, int crtc);
+extern int ironlake_enable_vblank(struct drm_device *dev, int crtc);
+extern void ironlake_disable_vblank(struct drm_device *dev, int crtc);
 extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc);
 extern u32 gm45_get_vblank_counter(struct drm_device *dev, int crtc);
 extern int i915_vblank_swap(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a58d477..d5dcb8f 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1344,10 +1344,7 @@ int i915_enable_vblank(struct drm_device *dev, int pipe)
 		return -EINVAL;
 
 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-	if (HAS_PCH_SPLIT(dev))
-		ironlake_enable_display_irq(dev_priv, (pipe == 0) ?
-					    DE_PIPEA_VBLANK: DE_PIPEB_VBLANK);
-	else if (INTEL_INFO(dev)->gen >= 4)
+	if (INTEL_INFO(dev)->gen >= 4)
 		i915_enable_pipestat(dev_priv, pipe,
 				     PIPE_START_VBLANK_INTERRUPT_ENABLE);
 	else
@@ -1362,6 +1359,22 @@ int i915_enable_vblank(struct drm_device *dev, int pipe)
 	return 0;
 }
 
+int ironlake_enable_vblank(struct drm_device *dev, int pipe)
+{
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+	unsigned long irqflags;
+
+	if (!i915_pipe_enabled(dev, pipe))
+		return -EINVAL;
+
+	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+	ironlake_enable_display_irq(dev_priv, (pipe == 0) ?
+				    DE_PIPEA_VBLANK: DE_PIPEB_VBLANK);
+	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+
+	return 0;
+}
+
 /* Called from drm generic code, passed 'crtc' which
  * we use as a pipe index
  */
@@ -1375,13 +1388,20 @@ void i915_disable_vblank(struct drm_device *dev, int pipe)
 		I915_WRITE(INSTPM,
 			   INSTPM_AGPBUSY_DIS << 16 | INSTPM_AGPBUSY_DIS);
 
-	if (HAS_PCH_SPLIT(dev))
-		ironlake_disable_display_irq(dev_priv, (pipe == 0) ?
-					     DE_PIPEA_VBLANK: DE_PIPEB_VBLANK);
-	else
-		i915_disable_pipestat(dev_priv, pipe,
-				      PIPE_VBLANK_INTERRUPT_ENABLE |
-				      PIPE_START_VBLANK_INTERRUPT_ENABLE);
+	i915_disable_pipestat(dev_priv, pipe,
+			      PIPE_VBLANK_INTERRUPT_ENABLE |
+			      PIPE_START_VBLANK_INTERRUPT_ENABLE);
+	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+}
+
+void ironlake_disable_vblank(struct drm_device *dev, int pipe)
+{
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+	unsigned long irqflags;
+
+	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+	ironlake_disable_display_irq(dev_priv, (pipe == 0) ?
+				     DE_PIPEA_VBLANK: DE_PIPEB_VBLANK);
 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 }
 
-- 
1.7.4.1

  parent reply	other threads:[~2011-04-28 22:13 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-04-28 22:12 [RFC] Ivy Bridge supprt v2 Jesse Barnes
2011-04-28 22:12 ` [PATCH 01/19] drm/i915: make FDI training a display function Jesse Barnes
2011-04-28 22:33   ` Keith Packard
2011-04-28 22:12 ` [PATCH 02/19] drm/i915: split irq handling into per-chipset functions Jesse Barnes
2011-04-28 22:37   ` Keith Packard
2011-05-18 11:51   ` [SNB: Regression] " Ted Phelps
2011-05-18 15:58     ` Jesse Barnes
2011-05-19 12:59       ` Ted Phelps
2011-04-28 22:12 ` Jesse Barnes [this message]
2011-04-28 22:39   ` [PATCH 03/19] drm/i915: split enable/disable vblank code into chipset specific functions Keith Packard
2011-04-28 22:12 ` [PATCH 04/19] drm/i915: add IS_GEN7 macro to cover Ivy Bridge and later Jesse Barnes
2011-04-28 22:40   ` Keith Packard
2011-04-28 22:12 ` [PATCH 05/19] drm/i915: add IS_IVYBRIDGE macro for checks Jesse Barnes
2011-04-28 22:41   ` Keith Packard
2011-04-28 22:12 ` [PATCH 06/19] drm/i915: Ivy Bridge has split display and pipe control Jesse Barnes
2011-04-28 22:41   ` Keith Packard
2011-04-28 22:12 ` [PATCH 07/19] drm/i915: add swizzle/tiling support for Ivy Bridge Jesse Barnes
2011-04-28 22:42   ` Keith Packard
2011-04-28 23:06     ` Jesse Barnes
2011-04-28 22:12 ` [PATCH 08/19] drm/i915: manual FDI training " Jesse Barnes
2011-04-28 22:43   ` Keith Packard
2011-04-28 23:06     ` Jesse Barnes
2011-04-28 22:12 ` [PATCH 09/19] drm/i915: automatic FDI training support " Jesse Barnes
2011-04-28 22:20   ` Jesse Barnes
2011-04-28 22:43   ` Keith Packard
2011-04-28 22:12 ` [PATCH 10/19] drm/i915: treat Ivy Bridge watermarks like Sandy Bridge Jesse Barnes
2011-04-28 22:46   ` Keith Packard
2011-04-28 23:06     ` Jesse Barnes
2011-04-28 22:12 ` [PATCH 11/19] drm/i915: interrupt & vblank support for Ivy Bridge Jesse Barnes
2011-04-28 22:47   ` Keith Packard
2011-06-28 10:55   ` Chris Wilson
2011-04-28 22:12 ` [PATCH 12/19] drm/i915: page flip " Jesse Barnes
2011-04-28 22:12 ` [PATCH 13/19] drm/i915: untested DP " Jesse Barnes
2011-04-28 22:47   ` Keith Packard
2011-05-01 16:26   ` Chris Wilson
2011-05-02  0:43     ` Keith Packard
2011-05-02 20:07     ` Jesse Barnes
2011-04-28 22:13 ` [PATCH 14/19] drm/i915: ring " Jesse Barnes
2011-04-28 22:48   ` Keith Packard
2011-04-28 22:13 ` [PATCH 15/19] agp/intel: add Ivy Bridge support Jesse Barnes
2011-04-28 22:13 ` [PATCH 16/19] drm/i915: add PantherPoint PCH ID Jesse Barnes
2011-04-28 22:13 ` [PATCH 17/19] drm/i915: add Ivy Bridge PCI IDs and driver feature structs Jesse Barnes
2011-04-28 22:49   ` Keith Packard
2011-04-28 22:13 ` [PATCH 18/19] drm/i915: set IBX pch type explicitly Jesse Barnes
2011-04-28 22:49   ` Keith Packard
2011-04-28 22:13 ` [PATCH 19/19] drm/i915: split clock gating init into per-chipset functions Jesse Barnes

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