From: tixy@yxit.co.uk (Tixy)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 48/51] ARM: kprobes: Decode 32-bit Thumb load/store single data item instructions
Date: Sat, 9 Jul 2011 11:57:35 +0100 [thread overview]
Message-ID: <1310209058-20980-49-git-send-email-tixy@yxit.co.uk> (raw)
In-Reply-To: <1310209058-20980-1-git-send-email-tixy@yxit.co.uk>
From: Jon Medhurst <tixy@yxit.co.uk>
We will reject probing of unprivileged load and store instructions.
These rarely occur and writing test cases for them is difficult.
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
---
arch/arm/kernel/kprobes-thumb.c | 153 +++++++++++++++++++++++++++++++++++++++
1 files changed, 153 insertions(+), 0 deletions(-)
diff --git a/arch/arm/kernel/kprobes-thumb.c b/arch/arm/kernel/kprobes-thumb.c
index bf1113c..9be8bea 100644
--- a/arch/arm/kernel/kprobes-thumb.c
+++ b/arch/arm/kernel/kprobes-thumb.c
@@ -118,6 +118,44 @@ t32_simulate_branch(struct kprobe *p, struct pt_regs *regs)
regs->ARM_pc = pc + (offset * 2);
}
+static void __kprobes
+t32_simulate_ldr_literal(struct kprobe *p, struct pt_regs *regs)
+{
+ kprobe_opcode_t insn = p->opcode;
+ unsigned long addr = thumb_probe_pc(p) & ~3;
+ int rt = (insn >> 12) & 0xf;
+ unsigned long rtv;
+
+ long offset = insn & 0xfff;
+ if (insn & 0x00800000)
+ addr += offset;
+ else
+ addr -= offset;
+
+ if (insn & 0x00400000) {
+ /* LDR */
+ rtv = *(unsigned long *)addr;
+ if (rt == 15) {
+ bx_write_pc(rtv, regs);
+ return;
+ }
+ } else if (insn & 0x00200000) {
+ /* LDRH */
+ if (insn & 0x01000000)
+ rtv = *(s16 *)addr;
+ else
+ rtv = *(u16 *)addr;
+ } else {
+ /* LDRB */
+ if (insn & 0x01000000)
+ rtv = *(s8 *)addr;
+ else
+ rtv = *(u8 *)addr;
+ }
+
+ regs->uregs[rt] = rtv;
+}
+
static enum kprobe_insn __kprobes
t32_decode_ldmstm(kprobe_opcode_t insn, struct arch_specific_insn *asi)
{
@@ -159,6 +197,32 @@ t32_emulate_ldrdstrd(struct kprobe *p, struct pt_regs *regs)
}
static void __kprobes
+t32_emulate_ldrstr(struct kprobe *p, struct pt_regs *regs)
+{
+ kprobe_opcode_t insn = p->opcode;
+ int rt = (insn >> 12) & 0xf;
+ int rn = (insn >> 16) & 0xf;
+ int rm = insn & 0xf;
+
+ register unsigned long rtv asm("r0") = regs->uregs[rt];
+ register unsigned long rnv asm("r2") = regs->uregs[rn];
+ register unsigned long rmv asm("r3") = regs->uregs[rm];
+
+ __asm__ __volatile__ (
+ "blx %[fn]"
+ : "=r" (rtv), "=r" (rnv)
+ : "0" (rtv), "1" (rnv), "r" (rmv), [fn] "r" (p->ainsn.insn_fn)
+ : "lr", "memory", "cc"
+ );
+
+ regs->uregs[rn] = rnv; /* Writeback base register */
+ if (rt == 15) /* Can't be true for a STR as they aren't allowed */
+ bx_write_pc(rtv, regs);
+ else
+ regs->uregs[rt] = rtv;
+}
+
+static void __kprobes
t32_emulate_rd8rn16rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
{
kprobe_opcode_t insn = p->opcode;
@@ -516,6 +580,87 @@ static const union decode_item t32_table_1111_100x_x0x1__1111[] = {
DECODE_END
};
+static const union decode_item t32_table_1111_100x[] = {
+ /* Store/Load single data item */
+
+ /* ??? 1111 100x x11x xxxx xxxx xxxx xxxx xxxx */
+ DECODE_REJECT (0xfe600000, 0xf8600000),
+
+ /* ??? 1111 1001 0101 xxxx xxxx xxxx xxxx xxxx */
+ DECODE_REJECT (0xfff00000, 0xf9500000),
+
+ /* ??? 1111 100x 0xxx xxxx xxxx 10x0 xxxx xxxx */
+ DECODE_REJECT (0xfe800d00, 0xf8000800),
+
+ /* STRBT 1111 1000 0000 xxxx xxxx 1110 xxxx xxxx */
+ /* STRHT 1111 1000 0010 xxxx xxxx 1110 xxxx xxxx */
+ /* STRT 1111 1000 0100 xxxx xxxx 1110 xxxx xxxx */
+ /* LDRBT 1111 1000 0001 xxxx xxxx 1110 xxxx xxxx */
+ /* LDRSBT 1111 1001 0001 xxxx xxxx 1110 xxxx xxxx */
+ /* LDRHT 1111 1000 0011 xxxx xxxx 1110 xxxx xxxx */
+ /* LDRSHT 1111 1001 0011 xxxx xxxx 1110 xxxx xxxx */
+ /* LDRT 1111 1000 0101 xxxx xxxx 1110 xxxx xxxx */
+ DECODE_REJECT (0xfe800f00, 0xf8000e00),
+
+ /* STR{,B,H} Rn,[PC...] 1111 1000 xxx0 1111 xxxx xxxx xxxx xxxx */
+ DECODE_REJECT (0xff1f0000, 0xf80f0000),
+
+ /* STR{,B,H} PC,[Rn...] 1111 1000 xxx0 xxxx 1111 xxxx xxxx xxxx */
+ DECODE_REJECT (0xff10f000, 0xf800f000),
+
+ /* LDR (literal) 1111 1000 x101 1111 xxxx xxxx xxxx xxxx */
+ DECODE_SIMULATEX(0xff7f0000, 0xf85f0000, t32_simulate_ldr_literal,
+ REGS(PC, ANY, 0, 0, 0)),
+
+ /* STR (immediate) 1111 1000 0100 xxxx xxxx 1xxx xxxx xxxx */
+ /* LDR (immediate) 1111 1000 0101 xxxx xxxx 1xxx xxxx xxxx */
+ DECODE_OR (0xffe00800, 0xf8400800),
+ /* STR (immediate) 1111 1000 1100 xxxx xxxx xxxx xxxx xxxx */
+ /* LDR (immediate) 1111 1000 1101 xxxx xxxx xxxx xxxx xxxx */
+ DECODE_EMULATEX (0xffe00000, 0xf8c00000, t32_emulate_ldrstr,
+ REGS(NOPCX, ANY, 0, 0, 0)),
+
+ /* STR (register) 1111 1000 0100 xxxx xxxx 0000 00xx xxxx */
+ /* LDR (register) 1111 1000 0101 xxxx xxxx 0000 00xx xxxx */
+ DECODE_EMULATEX (0xffe00fc0, 0xf8400000, t32_emulate_ldrstr,
+ REGS(NOPCX, ANY, 0, 0, NOSPPC)),
+
+ /* LDRB (literal) 1111 1000 x001 1111 xxxx xxxx xxxx xxxx */
+ /* LDRSB (literal) 1111 1001 x001 1111 xxxx xxxx xxxx xxxx */
+ /* LDRH (literal) 1111 1000 x011 1111 xxxx xxxx xxxx xxxx */
+ /* LDRSH (literal) 1111 1001 x011 1111 xxxx xxxx xxxx xxxx */
+ DECODE_EMULATEX (0xfe5f0000, 0xf81f0000, t32_simulate_ldr_literal,
+ REGS(PC, NOSPPCX, 0, 0, 0)),
+
+ /* STRB (immediate) 1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */
+ /* STRH (immediate) 1111 1000 0010 xxxx xxxx 1xxx xxxx xxxx */
+ /* LDRB (immediate) 1111 1000 0001 xxxx xxxx 1xxx xxxx xxxx */
+ /* LDRSB (immediate) 1111 1001 0001 xxxx xxxx 1xxx xxxx xxxx */
+ /* LDRH (immediate) 1111 1000 0011 xxxx xxxx 1xxx xxxx xxxx */
+ /* LDRSH (immediate) 1111 1001 0011 xxxx xxxx 1xxx xxxx xxxx */
+ DECODE_OR (0xfec00800, 0xf8000800),
+ /* STRB (immediate) 1111 1000 1000 xxxx xxxx xxxx xxxx xxxx */
+ /* STRH (immediate) 1111 1000 1010 xxxx xxxx xxxx xxxx xxxx */
+ /* LDRB (immediate) 1111 1000 1001 xxxx xxxx xxxx xxxx xxxx */
+ /* LDRSB (immediate) 1111 1001 1001 xxxx xxxx xxxx xxxx xxxx */
+ /* LDRH (immediate) 1111 1000 1011 xxxx xxxx xxxx xxxx xxxx */
+ /* LDRSH (immediate) 1111 1001 1011 xxxx xxxx xxxx xxxx xxxx */
+ DECODE_EMULATEX (0xfec00000, 0xf8800000, t32_emulate_ldrstr,
+ REGS(NOPCX, NOSPPCX, 0, 0, 0)),
+
+ /* STRB (register) 1111 1000 0000 xxxx xxxx 0000 00xx xxxx */
+ /* STRH (register) 1111 1000 0010 xxxx xxxx 0000 00xx xxxx */
+ /* LDRB (register) 1111 1000 0001 xxxx xxxx 0000 00xx xxxx */
+ /* LDRSB (register) 1111 1001 0001 xxxx xxxx 0000 00xx xxxx */
+ /* LDRH (register) 1111 1000 0011 xxxx xxxx 0000 00xx xxxx */
+ /* LDRSH (register) 1111 1001 0011 xxxx xxxx 0000 00xx xxxx */
+ DECODE_EMULATEX (0xfe800fc0, 0xf8000000, t32_emulate_ldrstr,
+ REGS(NOPCX, NOSPPCX, 0, 0, NOSPPC)),
+
+ /* Other unallocated instructions... */
+ DECODE_END
+};
+
const union decode_item kprobe_decode_thumb32_table[] = {
/*
@@ -573,6 +718,14 @@ const union decode_item kprobe_decode_thumb32_table[] = {
DECODE_TABLE (0xfe50f000, 0xf810f000, t32_table_1111_100x_x0x1__1111),
/*
+ * Store single data item
+ * 1111 1000 xxx0 xxxx xxxx xxxx xxxx xxxx
+ * Load single data items
+ * 1111 100x xxx1 xxxx xxxx xxxx xxxx xxxx
+ */
+ DECODE_TABLE (0xfe000000, 0xf8000000, t32_table_1111_100x),
+
+ /*
* Coprocessor instructions
* 1111 11xx xxxx xxxx xxxx xxxx xxxx xxxx
*/
--
1.7.2.5
next prev parent reply other threads:[~2011-07-09 10:57 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-09 10:56 ARM: kprobes: Add support for Thumb-2 Tixy
2011-07-09 10:56 ` [PATCH 01/51] ARM: Thumb-2: Fix exception return sequence to restore stack correctly Tixy
2011-07-11 18:07 ` Nicolas Pitre
2011-07-09 10:56 ` [PATCH 02/51] ARM: Thumb-2: Support Thumb-2 in undefined instruction handler Tixy
2011-07-11 18:14 ` Nicolas Pitre
2011-07-09 10:56 ` [PATCH 03/51] ARM: kprobes: Rename kprobes-decode.c to kprobes-arm.c Tixy
2011-07-09 10:56 ` [PATCH 04/51] ARM: kprobes: Split out internal parts of kprobes.h Tixy
2011-07-09 10:56 ` [PATCH 05/51] ARM: kprobes: Add kprobes-common.c Tixy
2011-07-09 10:56 ` [PATCH 06/51] ARM: kprobes: Move is_writeback define to header file Tixy
2011-07-09 10:56 ` [PATCH 07/51] ARM: kprobes: Move find_str_pc_offset into kprobes-common.c Tixy
2011-07-09 10:56 ` [PATCH 08/51] ARM: kprobes: Make str_pc_offset a constant on ARMv7 Tixy
2011-07-09 10:56 ` [PATCH 09/51] ARM: kprobes: Make kprobes framework work on Thumb-2 kernels Tixy
2011-07-09 10:56 ` [PATCH 10/51] ARM: kprobes: Add Thumb instruction decoding stubs Tixy
2011-07-09 10:56 ` [PATCH 11/51] ARM: Kconfig: Allow kprobes on Thumb-2 kernels Tixy
2011-07-11 11:01 ` Sergei Shtylyov
2011-07-11 11:33 ` Tixy
2011-07-11 11:42 ` Russell King - ARM Linux
2011-07-11 11:47 ` Tixy
2011-07-09 10:56 ` [PATCH 12/51] ARM: kprobes: Add Thumb breakpoint support Tixy
2011-07-09 10:57 ` [PATCH 13/51] ARM: kprobes: Add condition code checking to Thumb emulation Tixy
2011-07-09 10:57 ` [PATCH 14/51] ARM: kprobes: Add it_advance() Tixy
2011-07-09 10:57 ` [PATCH 15/51] ARM: kprobes: Don't trigger probes on conditional instructions when condition is false Tixy
2011-07-11 19:04 ` Nicolas Pitre
2011-07-09 10:57 ` [PATCH 16/51] ARM: kprobes: Use conditional breakpoints for ARM probes Tixy
2011-07-09 10:57 ` [PATCH 17/51] ARM: kprobes: Add hooks to override singlestep() Tixy
2011-07-09 10:57 ` [PATCH 18/51] ARM: kprobes: Extend arch_specific_insn to add pointer to emulated instruction Tixy
2011-07-11 19:19 ` Nicolas Pitre
2011-07-09 10:57 ` [PATCH 19/51] ARM: kprobes: Infrastructure for table driven decoding of CPU instructions Tixy
2011-07-11 20:05 ` Nicolas Pitre
2011-07-12 7:14 ` Tixy
2011-07-09 10:57 ` [PATCH 20/51] ARM: kprobes: Decode 16-bit Thumb hint instructions Tixy
2011-07-09 10:57 ` [PATCH 21/51] ARM: ptrace: Add APSR_MASK definition to ptrace.h Tixy
2011-07-09 10:57 ` [PATCH 22/51] ARM: kprobes: Decode 16-bit Thumb data-processing instructions Tixy
2011-07-09 10:57 ` [PATCH 23/51] ARM: kprobes: Add bx_write_pc() Tixy
2011-07-09 10:57 ` [PATCH 24/51] ARM: kprobes: Decode 16-bit Thumb BX and BLX instructions Tixy
2011-07-09 10:57 ` [PATCH 25/51] ARM: kprobes: Decode 16-bit Thumb special data instructions Tixy
2011-07-09 10:57 ` [PATCH 26/51] ARM: kprobes: Decode 16-bit Thumb load and store instructions Tixy
2011-07-09 10:57 ` [PATCH 27/51] ARM: kprobes: Decode 16-bit Thumb PC- and SP-relative address instructions Tixy
2011-07-09 10:57 ` [PATCH 28/51] ARM: kprobes: Decode 16-bit Thumb CBZ and bit manipulation instructions Tixy
2011-07-09 10:57 ` [PATCH 29/51] ARM: kprobes: Decode 16-bit Thumb PUSH and POP instructions Tixy
2011-07-09 10:57 ` [PATCH 30/51] ARM: kprobes: Decode 16-bit Thumb IT instruction Tixy
2011-07-09 10:57 ` [PATCH 31/51] ARM: kprobes: Reject 16-bit Thumb SVC and UNDEFINED instructions Tixy
2011-07-09 10:57 ` [PATCH 32/51] ARM: kprobes: Decode 16-bit Thumb branch instructions Tixy
2011-07-09 10:57 ` [PATCH 33/51] ARM: kprobes: Reject 16-bit Thumb SETEND, CPS and BKPT instructions Tixy
2011-07-09 10:57 ` [PATCH 34/51] ARM: kprobes: Decode 32-bit Thumb hint instructions Tixy
2011-07-09 10:57 ` [PATCH 35/51] ARM: kprobes: Add load_write_pc() Tixy
2011-07-09 10:57 ` [PATCH 36/51] ARM: kprobes: Add common decoding function for LDM and STM Tixy
2011-07-09 10:57 ` [PATCH 37/51] ARM: kprobes: Optimise emulation of " Tixy
2011-07-12 0:45 ` Nicolas Pitre
2011-07-12 7:20 ` Tixy
2011-07-09 10:57 ` [PATCH 38/51] ARM: kprobes: Decode 32-bit Thumb load/store multiple instructions Tixy
2011-07-09 10:57 ` [PATCH 39/51] ARM: kprobes: Decode 32-bit Thumb load/store dual and load/store exclusive instructions Tixy
2011-07-09 10:57 ` [PATCH 40/51] ARM: kprobes: Decode 32-bit Thumb table branch instructions Tixy
2011-07-09 10:57 ` [PATCH 41/51] ARM: kprobes: Decode 32-bit Thumb data-processing (shifted register) instructions Tixy
2011-07-09 10:57 ` [PATCH 42/51] ARM: kprobes: Decode 32-bit Thumb data-processing (modified immediate) instructions Tixy
2011-07-09 10:57 ` [PATCH 43/51] ARM: kprobes: Decode 32-bit Thumb data-processing (plain binary " Tixy
2011-07-09 10:57 ` [PATCH 44/51] ARM: kprobes: Decode 32-bit miscellaneous control instructions Tixy
2011-07-09 10:57 ` [PATCH 45/51] ARM: kprobes: Decode 32-bit Thumb branch instructions Tixy
2011-07-09 10:57 ` [PATCH 46/51] ARM: kprobes: Reject 32-bit Thumb coprocessor and SIMD instructions Tixy
2011-07-09 10:57 ` [PATCH 47/51] ARM: kprobes: Decode 32-bit Thumb memory hint instructions Tixy
2011-07-09 10:57 ` Tixy [this message]
2011-07-09 10:57 ` [PATCH 49/51] ARM: kprobes: Decode 32-bit Thumb data-processing (register) instructions Tixy
2011-07-09 10:57 ` [PATCH 50/51] ARM: kprobes: Decode 32-bit Thumb long multiply and divide instructions Tixy
2011-07-09 10:57 ` [PATCH 51/51] ARM: kprobes: Decode 32-bit Thumb multiply and absolute difference instructions Tixy
2011-07-12 1:02 ` ARM: kprobes: Add support for Thumb-2 Nicolas Pitre
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