[PATCH 6/7] drm/i915: Disable FDI RX before FDI TX

From: Keith Packard <keithp@keithp.com>
To: intel-gfx@lists.freedesktop.org, Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: [PATCH 6/7] drm/i915: Disable FDI RX before FDI TX
Date: Mon, 13 Aug 2012 21:34:50 -0700	[thread overview]
Message-ID: <1344918891-6283-7-git-send-email-keithp@keithp.com> (raw)
In-Reply-To: <1344918891-6283-1-git-send-email-keithp@keithp.com>

Doesn't make sense to disable in the other order.

Signed-off-by: Keith Packard <keithp@keithp.com>
---
 drivers/gpu/drm/i915/intel_display.c |   10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b099a17..754f10f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2776,17 +2776,17 @@ static void ironlake_fdi_disable(struct drm_crtc *crtc)
 	u32 reg, temp;
 
 	/* disable CPU FDI tx and PCH FDI rx */
-	reg = FDI_TX_CTL(pipe);
-	temp = I915_READ(reg);
-	I915_WRITE(reg, temp & ~FDI_TX_ENABLE);
-	POSTING_READ(reg);
-
 	reg = FDI_RX_CTL(pipe);
 	temp = I915_READ(reg);
 	temp &= ~(0x7 << 16);
 	temp |= (I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK) << 11;
 	I915_WRITE(reg, temp & ~FDI_RX_ENABLE);
+	POSTING_READ(reg);
+	udelay(100);
 
+	reg = FDI_TX_CTL(pipe);
+	temp = I915_READ(reg);
+	I915_WRITE(reg, temp & ~FDI_TX_ENABLE);
 	POSTING_READ(reg);
 	udelay(100);
 
-- 
1.7.10.4
