From: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
To: Intel Graphics <intel-gfx@lists.freedesktop.org>
Subject: [PATCH v2 9/9] drm/i915: Fixup HDMI output on Valleyview
Date: Thu, 27 Sep 2012 19:13:09 +0530 [thread overview]
Message-ID: <1348753389-30736-10-git-send-email-vijay.a.purushothaman@intel.com> (raw)
In-Reply-To: <1348753389-30736-1-git-send-email-vijay.a.purushothaman@intel.com>
Fixed correct min, max vco limits and dip ctl reg
Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
Signed-off-by: Gajanan Bhat <gajanan.bhat@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
drivers/gpu/drm/i915/intel_display.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0e6258a..71aa0a7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3683,7 +3683,7 @@
#define TVIDEO_DIP_DATA(pipe) _PIPE(pipe, _VIDEO_DIP_DATA_A, _VIDEO_DIP_DATA_B)
#define TVIDEO_DIP_GCP(pipe) _PIPE(pipe, _VIDEO_DIP_GCP_A, _VIDEO_DIP_GCP_B)
-#define VLV_VIDEO_DIP_CTL_A 0x60220
+#define VLV_VIDEO_DIP_CTL_A 0x60200
#define VLV_VIDEO_DIP_DATA_A 0x60208
#define VLV_VIDEO_DIP_GDCP_PAYLOAD_A 0x60210
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0362c80..64c94ca 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -380,7 +380,7 @@ static const intel_limit_t intel_limits_vlv_dac = {
static const intel_limit_t intel_limits_vlv_hdmi = {
.dot = { .min = 20000, .max = 165000 },
- .vco = { .min = 5994000, .max = 4000000 },
+ .vco = { .min = 4000000, .max = 5994000},
.n = { .min = 1, .max = 7 },
.m = { .min = 60, .max = 300 }, /* guess */
.m1 = { .min = 2, .max = 3 },
--
1.7.9.5
next prev parent reply other threads:[~2012-09-27 13:41 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-27 13:43 [PATCH v2 0/9] Enable all display interfaces in Valleyview Vijay Purushothaman
2012-09-27 13:43 ` [PATCH v2 1/9] drm/i915: Set aux clk to 100MHz for Valleyview Vijay Purushothaman
2012-09-27 15:11 ` Jesse Barnes
2012-09-27 13:43 ` [PATCH v2 2/9] drm/i915: Fix SDVO IER and status bits " Vijay Purushothaman
2012-09-27 15:13 ` Jesse Barnes
2012-09-27 13:43 ` [PATCH v2 3/9] drm/i915: Add Valleyview lane control definitions Vijay Purushothaman
2012-09-27 15:17 ` Jesse Barnes
2012-09-27 13:43 ` [PATCH v2 4/9] drm/i915: Program correct m n tu register for Valleyview Vijay Purushothaman
2012-09-27 15:18 ` Jesse Barnes
2012-09-27 13:43 ` [PATCH v2 5/9] drm/i915: Disable CRT hotplug detection for valleyview Vijay Purushothaman
2012-09-27 15:20 ` Jesse Barnes
2012-09-28 14:51 ` Daniel Vetter
2012-09-27 15:34 ` Jesse Barnes
2012-09-27 13:43 ` [PATCH v2 6/9] drm/i915: Enable DisplayPort in Valleyview Vijay Purushothaman
2012-09-27 15:23 ` Jesse Barnes
2012-09-28 15:03 ` Daniel Vetter
2012-09-27 13:43 ` [PATCH v2 7/9] drm/i915: Add eDP support for Valleyview Vijay Purushothaman
2012-09-27 15:24 ` Jesse Barnes
2012-09-28 15:08 ` Daniel Vetter
2012-09-27 13:43 ` [PATCH v2 8/9] drm/i915: panel power sequencing for VLV eDP Vijay Purushothaman
2012-09-27 15:26 ` Jesse Barnes
2012-09-27 16:59 ` Daniel Vetter
2012-09-27 13:43 ` Vijay Purushothaman [this message]
2012-09-27 15:26 ` [PATCH v2 9/9] drm/i915: Fixup HDMI output on Valleyview Jesse Barnes
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