[PATCH 0/9] some ivb fdi b/c fixes

From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 0/9] some ivb fdi b/c fixes
Date: Fri, 26 Oct 2012 10:58:10 +0200	[thread overview]
Message-ID: <1351241899-7870-1-git-send-email-daniel.vetter@ffwll.ch> (raw)

Hi all,

I've dug around in Bspec a bit to check out whether we're missing any
workarounds or have anything ordered the wrong way around in our setup sequence
for the fdi links. And indeed, there are a few small things. I have the illusion
that this patch series fixes fdi b/c issues for me, that will probably last
until the first test report.

There's still a funny w/a left that I'm working on - but it looks like it's a
voltage setting in a link somewhere that the bios should fix. So I'll likely
only add a check plus a debug printk.

The 2nd last patch introduces a new modeset hook and explains the big plans I
have for it. For this patch series it's overkill, but I'm already working on a
small haswell feature that also plugs into the same hook.

Comments, review and testing highly welcome.

Cheers, Daniel

[Now actually the right pile of patches ... ]

Daniel Vetter (9):
  drm/i915: shut up spurious message in intel_dp_get_hw_state
  drm/i915: Write the FDI RX TU size reg at the right time
  drm/i915: set FDI_RX_MISC to recommended values on CPT/PPT
  drm/i915: add comment about pch pll enabling rules
  drm/i915: CPT/PPT pch dp transcoder workaround
  drm/i915: BUG on impossible pch dp port
  drm/i915: drop unnecessary check from fdi_link_train code
  drm/i915: add ->display.modeset_global_resources callback
  drm/i915: check fdi B/C lane sharing constraint

 drivers/gpu/drm/i915/i915_drv.h      |   1 +
 drivers/gpu/drm/i915/i915_reg.h      |  13 ++-
 drivers/gpu/drm/i915/intel_display.c | 175 +++++++++++++++++++++++++++++++----
 drivers/gpu/drm/i915/intel_dp.c      |   5 +-
 4 files changed, 169 insertions(+), 25 deletions(-)

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1.7.11.4