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From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 09/36] drm/i915: clean up pipe bpp confusion
Date: Thu, 21 Feb 2013 01:50:01 +0100	[thread overview]
Message-ID: <1361407828-2419-10-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <1361407828-2419-1-git-send-email-daniel.vetter@ffwll.ch>

- gen4 and earlier (save for g4x) only really have a 8bpc pipe, with
  the possibility to dither to 6bpc using the panel fitter
- g4x has hdmi, but no 12 bpc pipe ... !? Clamp hdmi accordingly.
- TV/SDVO out are the only connectors available on platforms with
  a pipe bpp != 8, add code to force the pipe to 8bpc unconditionally.

<rant>
The dither handling on gmch platforms is one giant disaster. I'm hoping
somewhat that vlv enabling will fix this up, but given that the 6bpc
handling for edp was simply added with another quick hack, I don't have
high hopes ...
</rant>

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_display.c |  8 ++++++++
 drivers/gpu/drm/i915/intel_hdmi.c    |  5 +++--
 drivers/gpu/drm/i915/intel_sdvo.c    |  3 +++
 drivers/gpu/drm/i915/intel_tv.c      | 14 ++++++++------
 4 files changed, 22 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e630770..62f79df 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3880,6 +3880,14 @@ static bool intel_crtc_compute_config(struct drm_crtc *crtc,
 		adjusted_mode->hsync_start == adjusted_mode->hdisplay)
 		return false;
 
+	if (IS_G4X(dev) && pipe_config->pipe_bpp > 10) {
+		pipe_config->pipe_bpp = 10; /* 12bpc is gen5+ */
+	} else if (INTEL_INFO(dev)->gen <= 4 && pipe_config->pipe_bpp > 8) {
+		/* only a 8bpc pipe, with 6bpc dither through the panel fitter
+		 * for lvds. */
+		pipe_config->pipe_bpp = 8;
+	}
+
 	return true;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 7e92360..7018af4 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -799,9 +799,10 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
 
 	/*
 	 * HDMI is either 12 or 8, so if the display lets 10bpc sneak
-	 * through, clamp it down.
+	 * through, clamp it down. Note that only gen5+ has 12bpc pipes, g4x
+	 * only has a 10bpc pipe, all earlier platforms have only 8bpc.
 	 */
-	if (pipe_config->pipe_bpp > 8*3) {
+	if (pipe_config->pipe_bpp > 8*3 && INTEL_INFO(dev)->gen > 5) {
 		DRM_DEBUG_KMS("forcing bpc to 12 for HDMI\n");
 		pipe_config->pipe_bpp = 12*3;
 	} else {
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 02df8ad..5e3dfe8 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1045,6 +1045,9 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
 	struct drm_display_mode *mode = &pipe_config->requested_mode;
 
+	DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
+	pipe_config->pipe_bpp = 8*3;
+
 	if (HAS_PCH_SPLIT(encoder->base.dev))
 		pipe_config->has_pch_encoder = true;
 
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 984a113..29b14ed 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -905,11 +905,10 @@ intel_tv_mode_valid(struct drm_connector *connector,
 
 
 static bool
-intel_tv_mode_fixup(struct drm_encoder *encoder,
-		    const struct drm_display_mode *mode,
-		    struct drm_display_mode *adjusted_mode)
+intel_tv_compute_config(struct intel_encoder *encoder,
+			struct intel_crtc_config *pipe_config)
 {
-	struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
+	struct intel_tv *intel_tv = enc_to_intel_tv(&encoder->base);
 	const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
 
 	if (!tv_mode)
@@ -918,7 +917,10 @@ intel_tv_mode_fixup(struct drm_encoder *encoder,
 	if (intel_encoder_check_is_cloned(&intel_tv->base))
 		return false;
 
-	adjusted_mode->clock = tv_mode->clock;
+	pipe_config->adjusted_mode.clock = tv_mode->clock;
+	DRM_DEBUG_KMS("forcing bpc to 8 for TV\n");
+	pipe_config->pipe_bpp = 8*3;
+
 	return true;
 }
 
@@ -1485,7 +1487,6 @@ out:
 }
 
 static const struct drm_encoder_helper_funcs intel_tv_helper_funcs = {
-	.mode_fixup = intel_tv_mode_fixup,
 	.mode_set = intel_tv_mode_set,
 	.disable = intel_encoder_noop,
 };
@@ -1621,6 +1622,7 @@ intel_tv_init(struct drm_device *dev)
 	drm_encoder_init(dev, &intel_encoder->base, &intel_tv_enc_funcs,
 			 DRM_MODE_ENCODER_TVDAC);
 
+	intel_encoder->compute_config = intel_tv_compute_config;
 	intel_encoder->enable = intel_enable_tv;
 	intel_encoder->disable = intel_disable_tv;
 	intel_encoder->get_hw_state = intel_tv_get_hw_state;
-- 
1.7.11.4

  parent reply	other threads:[~2013-02-21  0:50 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-02-21  0:49 [PATCH 00/36] introduce pipe_config with fdi auto-dithering Daniel Vetter
2013-02-21  0:49 ` [PATCH 01/36] drm/i915: introduce struct intel_crtc_config Daniel Vetter
2013-02-21 14:38   ` Ville Syrjälä
2013-02-21  0:49 ` [PATCH 02/36] drm/i915: compute pipe_config earlier Daniel Vetter
2013-02-21  0:49 ` [PATCH 03/36] drm/i915: add pipe_config->timings_set Daniel Vetter
2013-02-21  0:49 ` [PATCH 04/36] drm/i915: add pipe_config->pixel_multiplier Daniel Vetter
2013-02-21  0:49 ` [PATCH 05/36] drm/i915: add pipe_config->has_pch_encoder Daniel Vetter
2013-02-21  0:49 ` [PATCH 06/36] drm/i915: clear up the fdi/dp set_m_n confusion Daniel Vetter
2013-02-21  0:49 ` [PATCH 07/36] drm/i915: move pipe bpp computation to pipe_config Daniel Vetter
2013-02-21 14:49   ` Ville Syrjälä
2013-02-21 14:54     ` Daniel Vetter
2013-02-21  0:50 ` [PATCH 08/36] drm/i915: clean up plane bpp confusion Daniel Vetter
2013-02-21  0:50 ` Daniel Vetter [this message]
2013-02-21  0:50 ` [PATCH 10/36] drm/i915: move dp_m_n computation to dp_encoder->compute_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 11/36] drm/i915: track dp target_clock in pipe_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 12/36] drm/i915: rip out superflous is_dp&is_cpu_edp tracking Daniel Vetter
2013-02-21  0:50 ` [PATCH 13/36] drm/i915: add hw state readout/checking for pipe_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 14/36] drm/i915: hw readout support for ->has_pch_encoders Daniel Vetter
2013-02-21  0:50 ` [PATCH 15/36] drm/i915: gen2 has no tv out support Daniel Vetter
2013-02-21  0:50 ` [PATCH 16/36] drm/i915: create pipe_config->dpll for clock state Daniel Vetter
2013-02-21  0:50 ` [PATCH 17/36] drm/i915: move dp clock computations to encoder->compute_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 18/36] drm/i915: add pipe_config->limited_color_range Daniel Vetter
2013-02-21  0:50 ` [PATCH 19/36] drm/i915: use pipe_config for lvds dithering Daniel Vetter
2013-02-21  0:50 ` [PATCH 20/36] drm/i915: move intel_crtc->fdi_lanes to pipe_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 21/36] drm/i915: fixup 12bpc hdmi dotclock handling Daniel Vetter
2013-02-21  0:50 ` [PATCH 22/36] drm/i915: hw state readout support for pipe_config->fdi_lanes Daniel Vetter
2013-02-21  0:50 ` [PATCH 23/36] drm/i915: split up fdi_set_m_n into computation and hw setup Daniel Vetter
2013-02-21  0:50 ` [PATCH 24/36] drm/i915: Disable high-bpc on pre-1.4 EDID screens Daniel Vetter
2013-02-21  0:50 ` [PATCH 25/36] drm/i915: force bpp for eDP panels Daniel Vetter
2013-02-21  0:50 ` [PATCH 26/36] drm/i915: allow high-bpc modes on DP Daniel Vetter
2013-02-21  0:50 ` [PATCH 27/36] drm/i915: extract i9xx_set_pipeconf Daniel Vetter
2013-02-21  0:50 ` [PATCH 28/36] drm/i915: drop adjusted_mode from *_set_pipeconf functions Daniel Vetter
2013-02-21  0:50 ` [PATCH 29/36] drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv Daniel Vetter
2013-02-21  0:50 ` [PATCH 30/36] drm/i915: compute fdi lane config earlier Daniel Vetter
2013-02-21  0:50 ` [PATCH 31/36] drm/i915: Split up ironlake_check_fdi_lanes Daniel Vetter
2013-02-21  0:50 ` [PATCH 32/36] drm/i915: move fdi lane configuration checks ahead Daniel Vetter
2013-02-21  0:50 ` [PATCH 33/36] drm/i915: don't count cpu ports for fdi B/C lane sharing Daniel Vetter
2013-02-21 10:28   ` Chris Wilson
2013-02-21 13:43     ` [PATCH] " Daniel Vetter
2013-02-21  0:50 ` [PATCH 34/36] drm/i915: consolidate pch pll computations a bit Daniel Vetter
2013-02-21  0:50 ` [PATCH 35/36] drm/i915: drop haswell fdi lane check from intel_crt_mode_valid Daniel Vetter
2013-02-21  0:50 ` [PATCH 36/36] drm/i915: implement fdi auto-dithering Daniel Vetter

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