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From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 13/31] drm/i915: drop crtc checking from assert_shared_dpll
Date: Wed,  5 Jun 2013 13:34:15 +0200	[thread overview]
Message-ID: <1370432073-27634-14-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <1370432073-27634-1-git-send-email-daniel.vetter@ffwll.ch>

The hw state readout code for the pipe config will now check
this for us, so rip out this hand-rolled complexity.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_display.c | 35 +++++++----------------------------
 1 file changed, 7 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1c4aedd..ea4b7a6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -905,7 +905,6 @@ intel_crtc_to_shared_dpll(struct intel_crtc *crtc)
 /* For ILK+ */
 static void assert_shared_dpll(struct drm_i915_private *dev_priv,
 			       struct intel_shared_dpll *pll,
-			       struct intel_crtc *crtc,
 			       bool state)
 {
 	u32 val;
@@ -925,28 +924,9 @@ static void assert_shared_dpll(struct drm_i915_private *dev_priv,
 	WARN(cur_state != state,
 	     "%s assertion failure (expected %s, current %s), val=%08x\n",
 	     pll->name, state_string(state), state_string(cur_state), val);
-
-	/* Make sure the selected PLL is correctly attached to the transcoder */
-	if (crtc && HAS_PCH_CPT(dev_priv->dev)) {
-		u32 pch_dpll;
-
-		pch_dpll = I915_READ(PCH_DPLL_SEL);
-		cur_state = pll->id == DPLL_ID_PCH_PLL_B;
-		if (!WARN(((pch_dpll >> (4 * crtc->pipe)) & 1) != cur_state,
-			  "PLL[%d] not attached to this transcoder %c: %08x\n",
-			  cur_state, pipe_name(crtc->pipe), pch_dpll)) {
-			cur_state = !!(val >> (4*crtc->pipe + 3));
-			WARN(cur_state != state,
-			     "PLL[%d] not %s on this transcoder %c: %08x\n",
-			     pll->id == DPLL_ID_PCH_PLL_B,
-			     state_string(state),
-			     pipe_name(crtc->pipe),
-			     val);
-		}
-	}
 }
-#define assert_shared_dpll_enabled(d, p, c) assert_shared_dpll(d, p, c, true)
-#define assert_shared_dpll_disabled(d, p, c) assert_shared_dpll(d, p, c, false)
+#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
+#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
 
 static void assert_fdi_tx(struct drm_i915_private *dev_priv,
 			  enum pipe pipe, bool state)
@@ -1404,7 +1384,7 @@ static void ironlake_enable_shared_dpll(struct intel_crtc *crtc)
 
 	if (pll->active++) {
 		WARN_ON(!pll->on);
-		assert_shared_dpll_enabled(dev_priv, pll, NULL);
+		assert_shared_dpll_enabled(dev_priv, pll);
 		return;
 	}
 
@@ -1431,11 +1411,11 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
 		      crtc->base.base.id);
 
 	if (WARN_ON(pll->active == 0)) {
-		assert_shared_dpll_disabled(dev_priv, pll, NULL);
+		assert_shared_dpll_disabled(dev_priv, pll);
 		return;
 	}
 
-	assert_shared_dpll_enabled(dev_priv, pll, NULL);
+	assert_shared_dpll_enabled(dev_priv, pll);
 	WARN_ON(!pll->on);
 	if (--pll->active)
 		return;
@@ -1458,8 +1438,7 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
 
 	/* Make sure PCH DPLL is enabled */
 	assert_shared_dpll_enabled(dev_priv,
-				   intel_crtc_to_shared_dpll(intel_crtc),
-				   intel_crtc);
+				   intel_crtc_to_shared_dpll(intel_crtc));
 
 	/* FDI must be feeding us bits for PCH ports */
 	assert_fdi_tx_enabled(dev_priv, pipe);
@@ -3080,7 +3059,7 @@ found:
 	if (pll->active == 0) {
 		DRM_DEBUG_DRIVER("setting up %s\n", pll->name);
 		WARN_ON(pll->on);
-		assert_shared_dpll_disabled(dev_priv, pll, NULL);
+		assert_shared_dpll_disabled(dev_priv, pll);
 
 		/* Wait for the clocks to stabilize before rewriting the regs */
 		I915_WRITE(PCH_DPLL(pll->id), dpll & ~DPLL_VCO_ENABLE);
-- 
1.7.11.7

  parent reply	other threads:[~2013-06-05 11:35 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-05 11:34 [PATCH 00/31] shared pch display pll rework Daniel Vetter
2013-06-05 11:34 ` [PATCH 01/31] drm/i915: fix up pch pll handling in ->mode_set Daniel Vetter
2013-06-05 11:34 ` [PATCH 02/31] drm/i915: conditionally disable pch resources in ilk_crtc_disable Daniel Vetter
2013-06-05 11:34 ` [PATCH 03/31] drm/i915: lock down pch pll accouting some more Daniel Vetter
2013-06-07 16:32   ` Ville Syrjälä
2013-06-07 20:03     ` Daniel Vetter
2013-06-07 20:46       ` Ville Syrjälä
2013-06-07 21:13         ` Daniel Vetter
2013-06-10 10:11           ` Ville Syrjälä
2013-06-10 14:34             ` Daniel Vetter
2013-06-10 14:47               ` Ville Syrjälä
2013-06-10 15:28                 ` [PATCH] " Daniel Vetter
2013-06-07 21:09     ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 04/31] drm/i915: s/pch_pll/shared_dpll/ Daniel Vetter
2013-06-05 11:34 ` [PATCH 05/31] drm/i915: switch crtc->shared_dpll from a pointer to an enum Daniel Vetter
2013-06-07 16:48   ` Ville Syrjälä
2013-06-07 21:10     ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 06/31] drm/i915: move shared_dpll into the pipe config Daniel Vetter
2013-06-07 17:03   ` Ville Syrjälä
2013-06-07 21:10     ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 07/31] drm/i915: refactor PCH_DPLL_SEL #defines Daniel Vetter
2013-06-05 11:34 ` [PATCH 08/31] drm/i915: hw state readout for shared pch plls Daniel Vetter
2013-06-07 17:23   ` Ville Syrjälä
2013-06-07 20:11     ` Daniel Vetter
2013-06-07 21:11     ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 09/31] drm/i915: consolidate ->num_shared_dplls assignement Daniel Vetter
2013-06-05 11:34 ` [PATCH 10/31] drm/i915: metadata for shared dplls Daniel Vetter
2013-06-05 11:34 ` [PATCH 11/31] drm/i915: scrap register address storage Daniel Vetter
2013-06-05 11:34 ` [PATCH 12/31] drm/i915: enable/disable hooks for shared dplls Daniel Vetter
2013-06-05 11:34 ` Daniel Vetter [this message]
2013-06-05 11:34 ` [PATCH 14/31] drm/i915: display pll hw state readout and checking Daniel Vetter
2013-06-12 13:31   ` Damien Lespiau
2013-06-12 13:39     ` Ville Syrjälä
2013-06-12 13:49       ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 15/31] drm/i915: extract readout_hw_state from setup_hw_state Daniel Vetter
2013-06-12 13:32   ` Damien Lespiau
2013-06-12 14:26   ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 16/31] drm/i915: split up intel_modeset_check_state Daniel Vetter
2013-06-12 13:33   ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 17/31] drm/i915: WARN on lack of shared dpll Daniel Vetter
2013-06-12 13:38   ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 18/31] drm/i915: hw state readout and cross-checking for shared dplls Daniel Vetter
2013-06-12 15:04   ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 19/31] drm/i915: fix up pch pll enabling for pixel multipliers Daniel Vetter
2013-06-12 15:12   ` Damien Lespiau
2013-06-12 19:34     ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 20/31] drm/i915: simplify the reduced clock handling for pch plls Daniel Vetter
2013-06-13 11:26   ` Damien Lespiau
2013-06-13 11:35     ` Daniel Vetter
2013-06-13 12:32       ` Damien Lespiau
2013-06-13 14:33         ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 21/31] drm/i915: consolidate pch pll enable sequence Daniel Vetter
2013-06-24 14:30   ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 22/31] drm/i915: use sw tracked state to select shared dplls Daniel Vetter
2013-06-12 15:20   ` Damien Lespiau
2013-06-05 11:34 ` [PATCH 23/31] drm/i915: duplicate intel_enable_pll into i9xx and vlv versions Daniel Vetter
2013-06-05 15:12   ` Jani Nikula
2013-06-05 22:52     ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 24/31] drm/i915: asserts for lvds pre_enable Daniel Vetter
2013-06-13 20:26   ` Imre Deak
2013-06-13 20:46     ` Daniel Vetter
2013-06-14 10:45       ` Imre Deak
2013-06-16 19:42     ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 25/31] drm/i915: move encoder pre enable hooks togther on ilk+ Daniel Vetter
2013-06-05 11:34 ` [PATCH 26/31] drm/i915: hw state readout for i9xx dplls Daniel Vetter
2013-06-05 11:34 ` [PATCH 27/31] drm/i915: move i9xx dpll enabling into crtc enable function Daniel Vetter
2013-06-05 15:13   ` Jani Nikula
2013-06-06  8:20     ` [PATCH] " Daniel Vetter
2013-06-14 16:02   ` [PATCH 27/31] " Imre Deak
2013-06-16 19:15     ` Daniel Vetter
2013-06-16 19:24     ` [PATCH] " Daniel Vetter
2013-06-05 11:34 ` [PATCH 28/31] drm/i915: s/pre_pll/pre/ on the lvds port " Daniel Vetter
2013-06-15  8:32   ` Imre Deak
2013-06-26 10:02     ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 29/31] drm/i915: clean up vlv ->pre_pll_enable and pll enable sequence Daniel Vetter
2013-06-06  8:22   ` [PATCH] " Daniel Vetter
2013-07-11 14:11     ` Imre Deak
2013-07-11 20:13       ` Daniel Vetter
2013-07-12 16:27       ` Daniel Vetter
2013-06-05 11:34 ` [PATCH 30/31] drm/i915: Fix up cpt pixel multiplier " Daniel Vetter
2013-06-05 11:34 ` [PATCH 31/31] drm/i915: clear DPLL reg when disabling i9xx dplls Daniel Vetter
2013-06-07 17:46 ` [PATCH 00/31] shared pch display pll rework Ville Syrjälä
2013-06-10 15:57   ` Ville Syrjälä
2013-06-10 18:16     ` Daniel Vetter

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