From: Heiko Stuebner <heiko@sntech.de>
To: linux-riscv@lists.infradead.org, Conor Dooley <conor@kernel.org>
Cc: palmer@dabbelt.com, damien.lemoal@opensource.wdc.com,
geert@linux-mk68.org, kernel@esmil.dk, arnd@arndb.de,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE
Date: Fri, 23 Sep 2022 21:09:03 +0200 [thread overview]
Message-ID: <13823003.RDIVbhacDa@phil> (raw)
In-Reply-To: <20220923185605.1900083-8-conor@kernel.org>
Hi Conor,
Am Freitag, 23. September 2022, 20:55:46 CEST schrieb Conor Dooley:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> As discussed at LPC, the SOC_ symbols are being converted to ARCH_
> for the sake of consistency between "incumbent" vendors and those who
> have a legacy from other archs.
>
> Convert SOC_STARFIVE to ARCH_STARFIVE across arch/riscv
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> arch/riscv/Kconfig.socs | 2 +-
> arch/riscv/boot/dts/starfive/Makefile | 2 +-
> arch/riscv/configs/defconfig | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index c4c7add1516f..910697baf097 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -17,7 +17,7 @@ config SOC_SIFIVE
> help
> This enables support for SiFive SoC platform hardware.
>
> -config SOC_STARFIVE
> +config ARCH_STARFIVE
doesn't this create a bisection issue?
I.e. the clk-Makefile in the following patch will still do
obj-$(CONFIG_SOC_STARFIVE) += starfive/
at this point, so if a git bisect lands here, you stop building
the clock-driver (and maybe more).
I guess some intermediate solution might be helpful, like
introduce the ARCH_STARFIVE and make SOC_STARFIVE select it.
Then do the conversions and after that drop SOC_STARFIVE?
Heiko
> bool "StarFive SoCs"
> select PINCTRL
> select RESET_CONTROLLER
> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> index 039c143cba33..7b00a48580ca 100644
> --- a/arch/riscv/boot/dts/starfive/Makefile
> +++ b/arch/riscv/boot/dts/starfive/Makefile
> @@ -1,2 +1,2 @@
> # SPDX-License-Identifier: GPL-2.0
> -dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index dac14b95c73d..971986be875f 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -27,7 +27,7 @@ CONFIG_EXPERT=y
> CONFIG_PROFILING=y
> CONFIG_ARCH_MICROCHIP_POLARFIRE=y
> CONFIG_SOC_SIFIVE=y
> -CONFIG_SOC_STARFIVE=y
> +CONFIG_ARCH_STARFIVE=y
> CONFIG_SOC_VIRT=y
> CONFIG_SMP=y
> CONFIG_HOTPLUG_CPU=y
>
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next prev parent reply other threads:[~2022-09-23 19:09 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
2022-09-23 18:55 ` [RFC 01/27] clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP Conor Dooley
2022-09-28 12:16 ` Christoph Hellwig
2022-09-28 12:51 ` Conor Dooley
2022-09-23 18:55 ` [RFC 02/27] i2c: microchip-corei2c: " Conor Dooley
2022-09-23 18:55 ` [RFC 03/27] mailbox: mpfs: " Conor Dooley
2022-09-23 18:55 ` [RFC 04/27] usb: musb: " Conor Dooley
2022-09-23 18:55 ` [RFC 05/27] rtc: " Conor Dooley
2022-09-23 18:55 ` [RFC 06/27] riscv: stop selecting the PolarFire SoC clock driver Conor Dooley
2022-09-23 18:55 ` [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE Conor Dooley
2022-09-23 19:09 ` Heiko Stuebner [this message]
2022-09-23 19:14 ` Conor Dooley
2022-09-23 19:20 ` Heiko Stuebner
2022-09-23 19:22 ` Conor Dooley
2022-09-23 18:55 ` [RFC 08/27] clk: starfive: " Conor Dooley
2022-09-23 18:55 ` [RFC 09/27] pinctrl: " Conor Dooley
2022-09-23 18:55 ` [RFC 10/27] reset: " Conor Dooley
2022-09-23 18:55 ` [RFC 11/27] riscv: replace SOC_SIFIVE with ARCH_SIFIVE Conor Dooley
2022-09-23 18:55 ` [RFC 12/27] soc: sifive: convert SOC_SIFIVE to ARCH_SIFIVE Conor Dooley
2022-09-23 18:55 ` [RFC 13/27] clk: " Conor Dooley
2022-09-23 18:55 ` [RFC 14/27] clk: sifive: select by default if ARCH_SIFIVE Conor Dooley
2022-09-23 18:55 ` [RFC 15/27] serial: " Conor Dooley
2022-09-23 18:55 ` [RFC 16/27] PCI: dwc: fu740: convert SOC_SIFIVE to ARCH_SIFIVE Conor Dooley
2022-09-23 18:55 ` [RFC 17/27] riscv: stop selecting SiFive clock and serial drivers directly Conor Dooley
2022-09-23 18:55 ` [RFC 18/27] riscv: convert SOC_VIRT to ARCH_VIRT Conor Dooley
2022-09-23 18:55 ` [RFC 19/27] kunit: tool: rename SOC_VIRT to ARCH_VIRT in riscv's QEMU config Conor Dooley
2022-09-23 18:55 ` [RFC 20/27] wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv Conor Dooley
2022-09-24 10:03 ` Jason A. Donenfeld
2022-09-23 18:56 ` [RFC 21/27] riscv: convert SOC_CANAAN to ARCH_CANAAN Conor Dooley
2022-09-23 18:56 ` [RFC 22/27] clk: k210: " Conor Dooley
2022-09-23 18:56 ` [RFC 23/27] pinctrl: " Conor Dooley
2022-09-23 18:56 ` [RFC 24/27] soc: " Conor Dooley
2022-09-23 18:56 ` [RFC 25/27] reset: " Conor Dooley
2022-09-23 18:56 ` [RFC 26/27] serial: sifive: select by default if ARCH_CANAAN Conor Dooley
2022-09-23 18:56 ` [RFC 27/27] riscv: stop directly selecting drivers for ARCH_CANAAN Conor Dooley
2022-09-23 18:59 ` [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
2022-09-26 1:50 ` Damien Le Moal
2022-09-26 8:02 ` Conor Dooley
2022-09-26 9:04 ` Geert Uytterhoeven
2022-09-27 6:34 ` Conor Dooley
2022-09-27 6:48 ` Arnd Bergmann
2022-09-27 6:57 ` Conor Dooley
2022-09-27 7:03 ` Geert Uytterhoeven
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