[PATCH 0/3] kvm: APICv register write workaround

From: "Radim Krčmář" <rkrcmar@redhat.com>
To: linux-kernel@vger.kernel.org
Cc: kvm@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
	Gleb Natapov <gleb@kernel.org>,
	Marcelo Tosatti <mtosatti@redhat.com>
Subject: [PATCH 0/3] kvm: APICv register write workaround
Date: Thu, 30 Oct 2014 15:06:44 +0100	[thread overview]
Message-ID: <1414678007-9377-1-git-send-email-rkrcmar@redhat.com> (raw)

APICv traps register writes, so we can't retrieve previous value, but
our code depends on detecting changes.

Apart from disabling APIC register virtualization, we can detect the
change by using extra memory.  One value history is enough, but we still
don't want to keep it for every APIC register, for performance reasons.
This leaves us with either a new framework, or exceptions ...
The latter options fits KVM's path better [1,2].

And when we already mirror a part of registers, optimizing access is
acceptable [3].  (Squashed to keep bisecters happy.)

---
Radim Krčmář (3):
  KVM: x86: detect SPIV changes under APICv
  KVM: x86: detect LVTT changes under APICv
  KVM: x86: optimize some accesses to LVTT and SPIV

 arch/x86/kvm/lapic.c | 32 +++++++++++++++++---------------
 arch/x86/kvm/lapic.h |  8 +++++---
 2 files changed, 22 insertions(+), 18 deletions(-)

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2.1.0