[RFC 0/5] Adding CPU mmap support to DRM_IOCTL_I915_GEM_MMAP_GTT

From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Intel-gfx@lists.freedesktop.org
Subject: [RFC 0/5] Adding CPU mmap support to DRM_IOCTL_I915_GEM_MMAP_GTT
Date: Tue, 26 Jan 2016 14:53:28 +0000	[thread overview]
Message-ID: <1453820013-3908-1-git-send-email-tvrtko.ursulin@linux.intel.com> (raw)

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

I had this code laying around from an abandoned project and decided to float it
in case someone can see the usefulness of it. Assuming the approach is even
remotely reasonable.

Currently the driver implements two ioctls to implement mmap(2) functionality.
Between the i915_gem_mmap_ioctl being not the right way to do it (it makes using
Valgrind impossible etc.), and i915_gem_mmap_gtt only supporting mapping via
GTT, there is an obvious way to improve things.

So this patch series tries to do that by extending the proper ioctl to support
mapping via CPU.

Approach I took was to extend the DRM offset manager to support assigning
vm operations with each node, instead of only having one set per-driver.

Won't spend too much time describing it unless there is real interest to
develop this or something like this further and the approach is at least
generally okay-ish.

Tvrtko Ursulin (5):
  drm: Allow drivers setting vm_ops per vma offset node
  drm/i915: Extract code mapping errno to vm fault code
  drm/i915: Add support for CPU mapping to DRM_IOCTL_I915_GEM_MMAP_GTT
  drm/i915: Add support for write-combined CPU mapping to
    DRM_IOCTL_I915_GEM_MMAP_GTT
  drm/i915: Announce the new DRM_IOCTL_I915_GEM_MMAP_GTT capabilities

 drivers/gpu/drm/drm_gem.c         |  53 ++++++----
 drivers/gpu/drm/drm_vma_manager.c |   1 +
 drivers/gpu/drm/i915/i915_dma.c   |   3 +
 drivers/gpu/drm/i915/i915_gem.c   | 207 +++++++++++++++++++++++++++++---------
 include/drm/drm_vma_manager.h     |  13 +++
 include/uapi/drm/i915_drm.h       |   5 +
 6 files changed, 216 insertions(+), 66 deletions(-)

-- 
1.9.1

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