From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH 0/3] CHV vblank failures when PSR is active
Date: Wed, 8 Jun 2016 18:46:01 -0700 [thread overview]
Message-ID: <1465436764-29950-1-git-send-email-dhinakaran.pandiyan@intel.com> (raw)
IGT vblank tests fail on CHV by timing out on VBIs if PSR is enabled. We
do not get VBIs as the source timing generation is disabled when PSR is
active. The first two patches written by Rodrigo add drm hooks. Patch 3
deactivates PSR when VBI are needed.
[PATCH 1/3] drm: Add vblank prepare and unprepare hooks.
[PATCH 2/3] drm/i915: Move drm_crtc_vblank_get out of disabled
[PATCH 3/3] drm/i915/psr: Do not activate PSR when vblank interrupts
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next reply other threads:[~2016-06-09 1:33 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-09 1:46 Dhinakaran Pandiyan [this message]
2016-06-09 1:46 ` [PATCH 1/3] drm: Add vblank prepare and unprepare hooks Dhinakaran Pandiyan
2016-06-10 21:21 ` REBASED: " Dhinakaran Pandiyan
2016-06-09 1:46 ` [PATCH 2/3] drm/i915: Move drm_crtc_vblank_get out of disabled pre-emption area Dhinakaran Pandiyan
2016-06-09 1:46 ` [PATCH 3/3] drm/i915/psr: Do not activate PSR when vblank interrupts are enabled Dhinakaran Pandiyan
2016-06-09 3:06 ` kbuild test robot
2016-06-14 0:09 ` Vivi, Rodrigo
2016-06-15 1:02 ` Pandiyan, Dhinakaran
2016-06-15 21:44 ` Vivi, Rodrigo
2016-06-24 18:39 ` Pandiyan, Dhinakaran
2016-06-09 5:00 ` ✗ Ro.CI.BAT: failure for CHV vblank failures when PSR is active Patchwork
2016-06-09 8:31 ` [PATCH 0/3] " Jani Nikula
2016-06-09 8:35 ` Ville Syrjälä
2016-06-11 6:32 ` ✗ Ro.CI.BAT: warning for CHV vblank failures when PSR is active (rev2) Patchwork
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