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From: Tim Chen <tim.c.chen@linux.intel.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>,
	Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@suse.de>,
	the arch/x86 maintainers <x86@kernel.org>,
	Linux PM <linux-pm@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	ACPI Devel Maling List <linux-acpi@vger.kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	jolsa@redhat.com
Subject: Re: [PATCH v4 10/10] cpufreq: intel_pstate: Use CPPC to get max performance
Date: Thu, 22 Sep 2016 12:01:41 -0700	[thread overview]
Message-ID: <1474570901.3916.198.camel@linux.intel.com> (raw)
In-Reply-To: <alpine.DEB.2.20.1609222055110.5640@nanos>

On Thu, 2016-09-22 at 20:56 +0200, Thomas Gleixner wrote:
> On Thu, 22 Sep 2016, Tim Chen wrote:
> > 
> > On Wed, 2016-09-21 at 22:30 +0200, Rafael J. Wysocki wrote:
> > > 
> > > My current understanding is that we need to rebuild sched domains
> > > after setting the priorities, 
> > No, that's not true.  We need to rebuild the sched domains only
> > when the sched domain flags are changed, not when we are changing
> > the priorities.  Only the sched domain flag is a property of
> > the sched domain. CPU priority values are not part of sched domain.
> > 
> > Morten had similar question about whether we need to rebuild sched domain
> > when we change cpu priorities when we first post the patches. 
> > Peter has explained that it wasn't necessary.
> > http://lkml.iu.edu/hypermail/linux/kernel/1608.3/01753.html
> And why is there no explanation in form of a comment in the code?

Sure, I'll add a comment.

Thanks.

Tim



  reply	other threads:[~2016-09-22 19:01 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-21 19:19 [PATCH v4 00/10] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
2016-09-21 19:19 ` [PATCH v4 01/10] x86/topology: Fix numa in package topology bug Srinivas Pandruvada
2016-09-30 11:55   ` [tip:sched/core] sched/core, x86/topology: Fix NUMA " tip-bot for Tim Chen
2016-09-21 19:19 ` [PATCH v4 02/10] sched: Extend scheduler's asym packing Srinivas Pandruvada
2016-09-21 19:19 ` [PATCH v4 03/10] x86/topology: Provide topology_num_packages() Srinivas Pandruvada
2016-09-21 19:19 ` [PATCH v4 04/10] x86/topology: Define x86's arch_update_cpu_topology Srinivas Pandruvada
2016-09-21 19:19 ` [PATCH v4 05/10] x86: Enable Intel Turbo Boost Max Technology 3.0 Srinivas Pandruvada
2016-09-21 19:19 ` [PATCH v4 06/10] x86/sysctl: Add sysctl for ITMT scheduling feature Srinivas Pandruvada
2016-09-21 19:19 ` [PATCH v4 07/10] x86/sched: Add SD_ASYM_PACKING flags to x86 ITMT CPU Srinivas Pandruvada
2016-09-21 19:58   ` kbuild test robot
2016-09-21 19:58     ` kbuild test robot
2016-09-21 20:27   ` kbuild test robot
2016-09-21 20:27     ` kbuild test robot
2016-09-21 20:33   ` Rafael J. Wysocki
2016-09-22 19:40     ` Tim Chen
2016-09-21 19:19 ` [PATCH v4 08/10] acpi: bus: Enable HWP CPPC objects Srinivas Pandruvada
2016-09-21 19:19 ` [PATCH v4 09/10] acpi: bus: Set _OSC for diverse core support Srinivas Pandruvada
2016-09-21 19:19 ` [PATCH v4 10/10] cpufreq: intel_pstate: Use CPPC to get max performance Srinivas Pandruvada
2016-09-21 20:30   ` Rafael J. Wysocki
2016-09-22 18:50     ` Tim Chen
2016-09-22 18:56       ` Thomas Gleixner
2016-09-22 19:01         ` Tim Chen [this message]
2016-09-22 20:58       ` Rafael J. Wysocki
2016-09-22 21:41         ` Tim Chen

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