[Qemu-devel] [PULL 11/23] target-m68k: Replace helper_xflag_lt with setcond

From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: schwab@linux-m68k.org, agraf@suse.de,
	Richard Henderson <rth@twiddle.net>,
	gerg@uclinux.org, Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] [PULL 11/23] target-m68k: Replace helper_xflag_lt with setcond
Date: Tue, 25 Oct 2016 21:03:07 +0200	[thread overview]
Message-ID: <1477422199-11208-12-git-send-email-laurent@vivier.eu> (raw)
In-Reply-To: <1477422199-11208-1-git-send-email-laurent@vivier.eu>

From: Richard Henderson <rth@twiddle.net>

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 target-m68k/helper.c    |  5 -----
 target-m68k/helper.h    |  1 -
 target-m68k/translate.c | 14 +++++++-------
 3 files changed, 7 insertions(+), 13 deletions(-)

diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 4fe36b8..dc55a7a 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -464,11 +464,6 @@ uint32_t HELPER(addx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2)
     return res;
 }
 
-uint32_t HELPER(xflag_lt)(uint32_t a, uint32_t b)
-{
-    return a < b;
-}
-
 void HELPER(set_sr)(CPUM68KState *env, uint32_t val)
 {
     env->sr = val & 0xffff;
diff --git a/target-m68k/helper.h b/target-m68k/helper.h
index f4e5fdf..c24ace5 100644
--- a/target-m68k/helper.h
+++ b/target-m68k/helper.h
@@ -8,7 +8,6 @@ DEF_HELPER_3(subx_cc, i32, env, i32, i32)
 DEF_HELPER_3(shl_cc, i32, env, i32, i32)
 DEF_HELPER_3(shr_cc, i32, env, i32, i32)
 DEF_HELPER_3(sar_cc, i32, env, i32, i32)
-DEF_HELPER_2(xflag_lt, i32, i32, i32)
 DEF_HELPER_2(set_sr, void, env, i32)
 DEF_HELPER_3(movec, void, env, i32, i32)
 
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index e2f176e..650c141 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1032,10 +1032,10 @@ DISAS_INSN(addsub)
     }
     if (add) {
         tcg_gen_add_i32(dest, tmp, src);
-        gen_helper_xflag_lt(QREG_CC_X, dest, src);
+        tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, src);
         s->cc_op = CC_OP_ADD;
     } else {
-        gen_helper_xflag_lt(QREG_CC_X, tmp, src);
+        tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, tmp, src);
         tcg_gen_sub_i32(dest, tmp, src);
         s->cc_op = CC_OP_SUB;
     }
@@ -1248,7 +1248,7 @@ DISAS_INSN(arith_im)
         break;
     case 2: /* subi */
         tcg_gen_mov_i32(dest, src1);
-        gen_helper_xflag_lt(QREG_CC_X, dest, tcg_const_i32(im));
+        tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, tcg_const_i32(im));
         tcg_gen_subi_i32(dest, dest, im);
         gen_update_cc_add(dest, tcg_const_i32(im));
         s->cc_op = CC_OP_SUB;
@@ -1257,7 +1257,7 @@ DISAS_INSN(arith_im)
         tcg_gen_mov_i32(dest, src1);
         tcg_gen_addi_i32(dest, dest, im);
         gen_update_cc_add(dest, tcg_const_i32(im));
-        gen_helper_xflag_lt(QREG_CC_X, dest, tcg_const_i32(im));
+        tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, tcg_const_i32(im));
         s->cc_op = CC_OP_ADD;
         break;
     case 5: /* eori */
@@ -1387,7 +1387,7 @@ DISAS_INSN(neg)
     tcg_gen_neg_i32(reg, src1);
     s->cc_op = CC_OP_SUB;
     gen_update_cc_add(reg, src1);
-    gen_helper_xflag_lt(QREG_CC_X, tcg_const_i32(0), src1);
+    tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, tcg_const_i32(0), src1);
     s->cc_op = CC_OP_SUB;
 }
 
@@ -1633,12 +1633,12 @@ DISAS_INSN(addsubq)
     } else {
         src2 = tcg_const_i32(val);
         if (insn & 0x0100) {
-            gen_helper_xflag_lt(QREG_CC_X, dest, src2);
+            tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, src2);
             tcg_gen_subi_i32(dest, dest, val);
             s->cc_op = CC_OP_SUB;
         } else {
             tcg_gen_addi_i32(dest, dest, val);
-            gen_helper_xflag_lt(QREG_CC_X, dest, src2);
+            tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, src2);
             s->cc_op = CC_OP_ADD;
         }
         gen_update_cc_add(dest, src2);
-- 
2.7.4
