From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
To: linux-renesas-soc@vger.kernel.org, wsa@the-dreams.de,
geert@linux-m68k.org
Cc: linux-serial@vger.kernel.org, magnus.damm@gmail.com,
sergei.shtylyov@cogentembedded.com,
Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Subject: [PATCH v2 0/7] Renesas *SCIF* RX FIFO support
Date: Mon, 23 Jan 2017 17:04:11 +0100 [thread overview]
Message-ID: <1485187458-8195-1-git-send-email-ulrich.hecht+renesas@gmail.com> (raw)
Hi!
This series implements support for using RX FIFO thresholds higher than one
in PIO mode on SCIF, HSCIF, SCIFA and SCIFB serial ports.
This revision addresses the issues found by Geert and Sergei in their
reviews, see below for details.
Setting the RX trigger on SH77xx-style ports is still not handled correctly,
mostly because we don't have any hardware to test against. I have changed
the trigger default for these ports to 1 to avoid regressions.
CU
Uli
Changes since v1:
- clarify HS trigger register enum
- simplify DR bit handling
- if() cascade -> switch()
- disable RX trigger for SH77xx-style ports
- clean up on failure to create sysfs attribute
- r8a7796 DT: add control pins, rtscts flag
Ulrich Hecht (7):
serial: sh-sci: add FIFO trigger bits
serial: sh-sci: consider DR (data ready) bit adequately
serial: sh-sci: implement FIFO threshold register setting
serial: sh-sci: increase RX FIFO trigger defaults for (H)SCIF
serial: sh-sci: SCIFA/B RX FIFO software timeout
serial: sh-sci: make RX FIFO parameters tunable via sysfs
arm64: dts: r8a7796: salvator-x: add SCIF1 (DEBUG1)
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 14 ++
drivers/tty/serial/sh-sci.c | 259 ++++++++++++++++++---
drivers/tty/serial/sh-sci.h | 8 +-
3 files changed, 248 insertions(+), 33 deletions(-)
--
2.7.4
next reply other threads:[~2017-01-23 16:04 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-23 16:04 Ulrich Hecht [this message]
2017-01-23 16:04 ` [PATCH v2 1/7] serial: sh-sci: add FIFO trigger bits Ulrich Hecht
2017-01-23 16:04 ` [PATCH v2 2/7] serial: sh-sci: consider DR (data ready) bit adequately Ulrich Hecht
2017-01-24 7:57 ` Geert Uytterhoeven
2017-01-23 16:04 ` [PATCH v2 3/7] serial: sh-sci: implement FIFO threshold register setting Ulrich Hecht
2017-01-23 16:04 ` [PATCH v2 4/7] serial: sh-sci: increase RX FIFO trigger defaults for (H)SCIF Ulrich Hecht
2017-01-24 8:00 ` Geert Uytterhoeven
2017-01-25 10:06 ` Greg KH
2017-01-23 16:04 ` [PATCH v2 5/7] serial: sh-sci: SCIFA/B RX FIFO software timeout Ulrich Hecht
2017-01-23 16:04 ` [PATCH v2 6/7] serial: sh-sci: make RX FIFO parameters tunable via sysfs Ulrich Hecht
2017-01-24 8:02 ` Geert Uytterhoeven
2017-01-23 16:04 ` [PATCH v2 7/7] arm64: dts: r8a7796: salvator-x: add SCIF1 (DEBUG1) Ulrich Hecht
2017-01-24 8:08 ` Geert Uytterhoeven
2017-01-25 9:47 ` Ulrich Hecht
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