Re: [PATCH 08/21] drm/i915: align the vma start to the largest gtt page size

From: Chris Wilson <chris@chris-wilson.co.uk>
To: Matthew Auld <matthew.auld@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 08/21] drm/i915: align the vma start to the largest gtt page size
Date: Fri, 06 Oct 2017 23:10:16 +0100	[thread overview]
Message-ID: <150732781667.10438.10123092706858406859@mail.alporthouse.com> (raw)
In-Reply-To: <20171006145041.21673-9-matthew.auld@intel.com>

Quoting Matthew Auld (2017-10-06 15:50:28)
> For the 48b PPGTT try to align the vma start address to the required
> page size boundary to guarantee we use said page size in the gtt. If we
> are dealing with multiple page sizes, we can't guarantee anything and
> just align to the largest. For soft pinning and objects which need to be
> tightly packed into the lower 32bits we don't force any alignment.
> 
> v2: various improvements suggested by Chris
> 
> v3: use set_pages and better placement of page_sizes
> 
> v4: prefer upper_32_bits()
> 
> v5: assign vma->page_sizes = vma->obj->page_sizes directly
>     prefer sizeof(vma->page_sizes)
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index 49bf49571e47..5067eab27829 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -493,6 +493,19 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
>                 if (ret)
>                         goto err_clear;
>         } else {
> +               /*
> +                * We only support huge gtt pages through the 48b PPGTT,
> +                * however we also don't want to force any alignment for
> +                * objects which need to be tightly packed into the low 32bits.
> +                */
> +               if (upper_32_bits(end) &&

Bah, this assumed PIN_ZONE_4G behaviour and forgot about 4G GGTT. :|

Insert a sly
		      !i915_vma_is_ggtt(vma) &&
here. Or use upper_32_bits(end-1). Hmm. Atm we have the pervasive
assumption that GGTT is capped at 4G, so we could use end-1 with a
comment.

The theory about not wanting to waste space in the low 4G is theory no
more!
-Chris
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