[PATCH 11/25] drm/msm/dpu: remove reserve in encoder mode_set

From: Jeykumar Sankaran <jsanka-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: hoegsberg-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
	Jeykumar Sankaran
	<jsanka-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
	robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Subject: [PATCH 11/25] drm/msm/dpu: remove reserve in encoder mode_set
Date: Mon,  8 Oct 2018 21:27:28 -0700	[thread overview]
Message-ID: <1539059262-8326-12-git-send-email-jsanka@codeaurora.org> (raw)
In-Reply-To: <1539059262-8326-1-git-send-email-jsanka-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

Now that we have crtc state tracking the reserved
HW resources, we have access to them after atomic swap.
So avoid reserving the resources in mode_set.

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 17 ++---------------
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index a8fd14e..dd482ca 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -636,7 +636,6 @@ static int dpu_encoder_virt_atomic_check(
 
 	topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode);
 
-	/* Reserve dynamic resources now. Indicating AtomicTest phase */
 	if (!ret) {
 		/*
 		 * Avoid reserving resources when mode set is pending. Topology
@@ -645,7 +644,7 @@ static int dpu_encoder_virt_atomic_check(
 		if (drm_atomic_crtc_needs_modeset(crtc_state)
 				&& dpu_enc->mode_set_complete) {
 			ret = dpu_rm_reserve(&dpu_kms->rm, drm_enc, crtc_state,
-					     topology, true);
+					     topology, false);
 			dpu_enc->mode_set_complete = false;
 		}
 	}
@@ -1002,8 +1001,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
 	struct list_head *connector_list;
 	struct drm_connector *conn = NULL, *conn_iter;
 	struct dpu_crtc_state *dpu_cstate;
-	struct msm_display_topology topology;
-	int i = 0, ret;
+	int i = 0;
 
 	if (!drm_enc) {
 		DPU_ERROR("invalid encoder\n");
@@ -1031,17 +1029,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
 		return;
 	}
 
-	topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode);
-
-	/* Reserve dynamic resources now. Indicating non-AtomicTest phase */
-	ret = dpu_rm_reserve(&dpu_kms->rm, drm_enc, drm_enc->crtc->state,
-			     topology, false);
-	if (ret) {
-		DPU_ERROR_ENC(dpu_enc,
-				"failed to reserve hw resources, %d\n", ret);
-		return;
-	}
-
 	dpu_cstate = to_dpu_crtc_state(drm_enc->crtc->state);
 
 	for (i = 0; i < dpu_enc->num_phys_encs; i++) {
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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