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From: Swati Sharma <swati2.sharma@intel.com>
To: dri-devel@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org
Subject: [PATCH v4 1/4] drm: Add Y210, Y212, Y216 format definitions and fourcc
Date: Thu,  6 Dec 2018 14:56:47 +0530	[thread overview]
Message-ID: <1544088410-14016-2-git-send-email-swati2.sharma@intel.com> (raw)
In-Reply-To: <1544088410-14016-1-git-send-email-swati2.sharma@intel.com>

The following pixel formats are packed format that follows 4:2:2
chroma sampling. For memory represenation each component is
allocated 16 bits each. Thus each pixel occupies 32bit.

Y210: Valid data occupies MSB 10 bits.
      LSB 6 bits are filled with zeroes.
Y212: Valid data occupies MSB 12 bits.
      LSB 4 bits are filled with zeroes.
Y216: Valid data occupies 16 bits,
      doesn't require any padding bits.

First 16 bits stores the Y value and the next 16 bits stores one
of the chroma samples alternatively. The first luma sample will
be accompanied by first U sample and second luma sample is
accompanied by the first V sample.

v2: is_yuv setted to true (mahesh)
    different order of yuv samples (mahesh): still update from
    hardware team pending
    change in comment (alexandru)

v3: change in patch comment (juha)
    change in fourcc_code comment (juha)
    different order of yuv samples needs to be defined for Y210/
    Y212/Y216 (update from h/w folks): not including in this patch,
    will do in other patch series (if reqd)

v4: rebase

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
---
 drivers/gpu/drm/drm_fourcc.c  | 3 +++
 include/uapi/drm/drm_fourcc.h | 8 ++++++++
 2 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index d90ee03..fd011f6 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -226,6 +226,9 @@ const struct drm_format_info *__drm_format_info(u32 format)
 		{ .format = DRM_FORMAT_VYUY,		.depth = 0,  .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
 		{ .format = DRM_FORMAT_XYUV8888,	.depth = 0,  .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
 		{ .format = DRM_FORMAT_AYUV,		.depth = 0,  .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
+		{ .format = DRM_FORMAT_Y210,            .depth = 0,  .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
+		{ .format = DRM_FORMAT_Y212,            .depth = 0,  .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
+		{ .format = DRM_FORMAT_Y216,            .depth = 0,  .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
 		{ .format = DRM_FORMAT_Y0L0,		.depth = 0,  .num_planes = 1,
 		  .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
 		  .hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 0b44260..d46a8e1 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -154,6 +154,14 @@
 #define DRM_FORMAT_XYUV8888		fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
 
 /*
+ * packed Y2xx indicate for each component, xx valid data occupy msb
+ * 16-xx padding occupy lsb
+ */
+#define DRM_FORMAT_Y210         fourcc_code('Y', '2', '1', '0') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 10:6:10:6:10:6:10:6 little endian */
+#define DRM_FORMAT_Y212         fourcc_code('Y', '2', '1', '2') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 12:4:12:4:12:4:12:4 little endian */
+#define DRM_FORMAT_Y216         fourcc_code('Y', '2', '1', '6') /* [63:0] Y0:Cb0:Y1:Cr1 16:16:16:16 little endian */
+
+/*
  * packed YCbCr420 2x2 tiled formats
  * first 64 bits will contain Y,Cb,Cr components for a 2x2 tile
  */
-- 
1.9.1

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  reply	other threads:[~2018-12-06  9:26 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-06  9:26 [PATCH v4 0/4] Enable Y210, Y212, Y216 formats for ICL Swati Sharma
2018-12-06  9:26 ` Swati Sharma [this message]
2018-12-06  9:26 ` [PATCH v4 2/4] drm/i915/icl: Add Y210, Y212, Y216 plane control definitions Swati Sharma
2018-12-06  9:26 ` [PATCH v4 3/4] drm/i915/icl: Preparations for enabling Y210, Y212, Y216 formats Swati Sharma
2018-12-06  9:26 ` [PATCH v4 4/4] drm/i915/icl: Enable Y210, Y212, Y216 format for primary and sprite planes Swati Sharma
2018-12-06 10:45 ` ✗ Fi.CI.CHECKPATCH: warning for Enable Y210, Y212, Y216 formats for ICL (rev4) Patchwork
2018-12-06 11:06 ` ✓ Fi.CI.BAT: success " Patchwork
2018-12-07  5:14 ` ✓ Fi.CI.IGT: " Patchwork

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