Re: [PATCH v4 4/8] drm/i915: vgpu context submission pv optimization

From: Chris Wilson <chris@chris-wilson.co.uk>
To: Xiaolin Zhang <xiaolin.zhang@intel.com>,
	intel-gfx@lists.freedesktop.org,
	intel-gvt-dev@lists.freedesktop.org
Cc: zhenyu.z.wang@intel.com, hang.yuan@intel.com, zhiyuan.lv@intel.com
Subject: Re: [PATCH v4 4/8] drm/i915: vgpu context submission pv optimization
Date: Fri, 29 Mar 2019 07:15:12 +0000	[thread overview]
Message-ID: <155384371225.24691.4461093612777355542@skylake-alporthouse-com> (raw)
In-Reply-To: <1553866364-111114-5-git-send-email-xiaolin.zhang@intel.com>

Quoting Xiaolin Zhang (2019-03-29 13:32:40)
> It is performance optimization to override the actual submisison backend
> in order to eliminate execlists csb process and reduce mmio trap numbers
> for workload submission without contextswith interrupt by talking with
> GVT via PV submisison notification mechanism between guest and GVT.

> Use PV_SUBMISSION to control this level of pv optimization.
> 
> v0: RFC
> v1: rebase
> v2: added pv ops for pv context submission. to maximize code resuse,
> introduced 2 more ops (submit_ports & preempt_context) instead of 1 op
> (set_default_submission) in engine structure. pv version of
> submit_ports and preempt_context implemented.
> v3:
> 1. to reduce more code duplication, code refactor and replaced 2 ops
> "submit_ports & preempt_contex" from v2 by 1 ops "write_desc"
> in engine structure. pv version of write_des implemented.
> 2. added VGT_G2V_ELSP_SUBMIT for g2v pv notification.
> v4: implemented pv elsp submission tasklet as the backend workload
> submisison by talking to GVT with PV notificaiton mechanism and renamed
> VGT_G2V_ELSP_SUBMIT to VGT_G2V_PV_SUBMISIION.
> 
> Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c    |   2 +
>  drivers/gpu/drm/i915/i915_pvinfo.h |   1 +
>  drivers/gpu/drm/i915/i915_vgpu.c   | 158 ++++++++++++++++++++++++++++++++++++-
>  drivers/gpu/drm/i915/i915_vgpu.h   |  10 +++
>  drivers/gpu/drm/i915/intel_lrc.c   |   3 +
>  5 files changed, 173 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 2f78829..28e8ee0 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -37,6 +37,7 @@
>  #include "i915_drv.h"
>  #include "i915_trace.h"
>  #include "intel_drv.h"
> +#include "i915_vgpu.h"
>  
>  /**
>   * DOC: interrupt handling
> @@ -1470,6 +1471,7 @@ gen8_cs_irq_handler(struct intel_engine_cs *engine, u32 iir)
>         if (iir & GT_RENDER_USER_INTERRUPT) {
>                 intel_engine_breadcrumbs_irq(engine);
>                 tasklet |= USES_GUC_SUBMISSION(engine->i915);
> +               tasklet |= USES_PV_SUBMISSION(engine->i915);

You call this an optimisation!
-Chris
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