From: fabrizio.castro@bp.renesas.com (Fabrizio Castro)
To: cip-dev@lists.cip-project.org
Subject: [cip-dev] [PATCH 4.19.y-cip 13/32] drm: rcar-du: Add interlaced feature flag
Date: Mon, 16 Sep 2019 16:50:27 +0100 [thread overview]
Message-ID: <1568649046-17420-14-git-send-email-fabrizio.castro@bp.renesas.com> (raw)
In-Reply-To: <1568649046-17420-1-git-send-email-fabrizio.castro@bp.renesas.com>
From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
commit c6e3194a3b55a9365e40c3a25f8e31afa154c26c upstream.
Upcoming implementations of the R-Car DU have removed support for
interlaced display pipelines. Provide a means to determine this based on
the feature flags of the hardware configuration structs.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 14 ++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_drv.c | 32 +++++++++++++++++++++-----------
drivers/gpu/drm/rcar-du/rcar_du_drv.h | 1 +
3 files changed, 36 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
index 15dc9ca..4b43d83 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
@@ -684,11 +684,25 @@ static void rcar_du_crtc_atomic_flush(struct drm_crtc *crtc,
rcar_du_vsp_atomic_flush(rcrtc);
}
+enum drm_mode_status rcar_du_crtc_mode_valid(struct drm_crtc *crtc,
+ const struct drm_display_mode *mode)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+ struct rcar_du_device *rcdu = rcrtc->group->dev;
+ bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
+
+ if (interlaced && !rcar_du_has(rcdu, RCAR_DU_FEATURE_INTERLACED))
+ return MODE_NO_INTERLACE;
+
+ return MODE_OK;
+}
+
static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
.atomic_begin = rcar_du_crtc_atomic_begin,
.atomic_flush = rcar_du_crtc_atomic_flush,
.atomic_enable = rcar_du_crtc_atomic_enable,
.atomic_disable = rcar_du_crtc_atomic_disable,
+ .mode_valid = rcar_du_crtc_mode_valid,
};
static struct drm_crtc_state *
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index dfa09cf..3f0cbc4 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -39,7 +39,8 @@
static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
- | RCAR_DU_FEATURE_EXT_CTRL_REGS,
+ | RCAR_DU_FEATURE_EXT_CTRL_REGS
+ | RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -60,7 +61,8 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
- | RCAR_DU_FEATURE_EXT_CTRL_REGS,
+ | RCAR_DU_FEATURE_EXT_CTRL_REGS
+ | RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -108,7 +110,7 @@ static const struct rcar_du_device_info rcar_du_r8a774a1_info = {
static const struct rcar_du_device_info rcar_du_r8a7779_info = {
.gen = 2,
- .features = 0,
+ .features = RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -129,7 +131,8 @@ static const struct rcar_du_device_info rcar_du_r8a7779_info = {
static const struct rcar_du_device_info rcar_du_r8a7790_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
- | RCAR_DU_FEATURE_EXT_CTRL_REGS,
+ | RCAR_DU_FEATURE_EXT_CTRL_REGS
+ | RCAR_DU_FEATURE_INTERLACED,
.quirks = RCAR_DU_QUIRK_ALIGN_128B,
.channels_mask = BIT(2) | BIT(1) | BIT(0),
.routes = {
@@ -157,7 +160,8 @@ static const struct rcar_du_device_info rcar_du_r8a7790_info = {
static const struct rcar_du_device_info rcar_du_r8a7791_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
- | RCAR_DU_FEATURE_EXT_CTRL_REGS,
+ | RCAR_DU_FEATURE_EXT_CTRL_REGS
+ | RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -179,7 +183,8 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = {
static const struct rcar_du_device_info rcar_du_r8a7792_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
- | RCAR_DU_FEATURE_EXT_CTRL_REGS,
+ | RCAR_DU_FEATURE_EXT_CTRL_REGS
+ | RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/* R8A7792 has two RGB outputs. */
@@ -197,7 +202,8 @@ static const struct rcar_du_device_info rcar_du_r8a7792_info = {
static const struct rcar_du_device_info rcar_du_r8a7794_info = {
.gen = 2,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
- | RCAR_DU_FEATURE_EXT_CTRL_REGS,
+ | RCAR_DU_FEATURE_EXT_CTRL_REGS
+ | RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -219,7 +225,8 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@@ -251,7 +258,8 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@@ -279,7 +287,8 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(3) | BIT(1) | BIT(0),
.routes = {
/*
@@ -307,7 +316,8 @@ static const struct rcar_du_device_info rcar_du_r8a77970_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_EXT_CTRL_REGS
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_INTERLACED,
.channels_mask = BIT(0),
.routes = {
/* R8A77970 has one RGB output and one LVDS output. */
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
index 78ea20a..c4a6613 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
@@ -30,6 +30,7 @@ struct rcar_du_device;
#define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK BIT(0) /* Per-CRTC IRQ and clock */
#define RCAR_DU_FEATURE_EXT_CTRL_REGS BIT(1) /* Has extended control registers */
#define RCAR_DU_FEATURE_VSP1_SOURCE BIT(2) /* Has inputs from VSP1 */
+#define RCAR_DU_FEATURE_INTERLACED BIT(3) /* HW supports interlaced */
#define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */
--
2.7.4
next prev parent reply other threads:[~2019-09-16 15:50 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-16 15:50 [cip-dev] [PATCH 4.19.y-cip 00/32] Add PCIe and HDMI support to HiHope RZ/G2M Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 01/32] dt-bindings: PCI: rcar: Add device tree support for r8a774a1 Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 02/32] dt-bindings: display: renesas: du: Document the r8a774a1 bindings Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 03/32] dt-bindings: display: renesas: lvds: Document " Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 04/32] dt-bindings: display: renesas: Add r8a774a1 support Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 05/32] PCI: rcar: Replace unsigned long with u32/unsigned int in register accessors Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 06/32] PCI: rcar: Replace various variable types with unsigned ones for register values Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 07/32] PCI: rcar: Clean up debug messages Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 08/32] PCI: rcar: Do not shadow the 'irq' variable Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 09/32] drm: rcar-du: Add R8A774A1 support Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 10/32] drm: rcar-du: lvds: Add r8a774a1 support Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 11/32] drm: rcar-du: dw-hdmi: Reject modes with a too high clock frequency Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 12/32] drm: rcar-du: Refactor Feature and Quirk definitions Fabrizio Castro
2019-09-16 15:50 ` Fabrizio Castro [this message]
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 14/32] drm: rcar-du: Cache DSYSR value to ensure known initial value Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 15/32] drm: rcar-du: Don't use TV sync mode when not supported by the hardware Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 16/32] drm: rcar-du: Support interlaced video output through vsp1 Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 17/32] drm: rcar-du: Rework clock configuration based on hardware limits Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 18/32] drm: rcar-du: Rename and document dpll_ch field Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 19/32] drm: rcar-du: Add support for missing pixel formats Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 20/32] drm: rcar-du: Store V4L2 fourcc in rcar_du_format_info structure Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 21/32] drm: rcar-du: Update framebuffer pitch and alignment limits for Gen3 Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 22/32] arm64: dts: renesas: r8a774a1: Add PCIe device nodes Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 23/32] arm64: dts: renesas: hihope-common: Declare pcie bus clock Fabrizio Castro
2019-09-17 12:36 ` nobuhiro1.iwamatsu at toshiba.co.jp
2019-09-17 13:06 ` Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 24/32] arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 25/32] arm64: dts: renesas: r8a774a1: Add VSP instances Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 26/32] arm64: dts: renesas: r8a774a1: Add DU device to DT Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 27/32] arm64: dts: renesas: r8a774a1: Add FDP1 instance Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 28/32] arm64: dts: renesas: r8a774a1: Tie SYS-DMAC to IPMMU-DS0/1 Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 29/32] arm64: dts: renesas: r8a774a1: Tie Audio-DMAC to IPMMU-MP Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 30/32] arm64: dts: renesas: r8a774a1: Connect Ethernet-AVB to IPMMU-DS0 Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 31/32] arm64: dts: renesas: r8a774a1: Add HDMI encoder instance Fabrizio Castro
2019-09-16 15:50 ` [cip-dev] [PATCH 4.19.y-cip 32/32] arm64: dts: renesas: hihope-common: Add HDMI support Fabrizio Castro
2019-09-17 1:06 ` [cip-dev] [PATCH 4.19.y-cip 00/32] Add PCIe and HDMI support to HiHope RZ/G2M nobuhiro1.iwamatsu at toshiba.co.jp
2019-09-17 9:38 ` Pavel Machek
2019-09-18 5:25 ` nobuhiro1.iwamatsu at toshiba.co.jp
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