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From: "tip-bot2 for Stephane Eranian" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Stephane Eranian <eranian@google.com>,
	Ingo Molnar <mingo@kernel.org>, x86 <x86@kernel.org>,
	LKML <linux-kernel@vger.kernel.org>
Subject: [tip: perf/core] perf/x86/rapl: Flip logic on default events visibility
Date: Thu, 28 May 2020 06:49:01 -0000	[thread overview]
Message-ID: <159064854169.17951.15029107929974938885.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20200527224659.206129-4-eranian@google.com>

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     2a3e3f73a23b4ff2c0065d3a42edc18ad94b7851
Gitweb:        https://git.kernel.org/tip/2a3e3f73a23b4ff2c0065d3a42edc18ad94b7851
Author:        Stephane Eranian <eranian@google.com>
AuthorDate:    Wed, 27 May 2020 15:46:57 -07:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Thu, 28 May 2020 07:58:55 +02:00

perf/x86/rapl: Flip logic on default events visibility

This patch modifies the default visibility of the attribute_group
for each RAPL event. By default if the grp.is_visible field is NULL,
sysfs considers that it must display the attribute group.
If the field is not NULL (callback function), then the return value
of the callback determines the visibility (0 = not visible). The RAPL
attribute groups had the field set to NULL, meaning that unless they
failed the probing from perf_msr_probe(), they would be visible. We want
to avoid having to specify attribute groups that are not supported by the HW
in the rapl_msrs[] array, they don't have an MSR address to begin with.

Therefore, we intialize the visible field of all RAPL attribute groups
to a callback that returns 0. If the RAPL msr goes through probing
and succeeds the is_visible field will be set back to NULL (visible).
If the probing fails the field is set to a callback that return 0 (not visible).

Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200527224659.206129-4-eranian@google.com
---
 arch/x86/events/rapl.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c
index f29935e..8d17af4 100644
--- a/arch/x86/events/rapl.c
+++ b/arch/x86/events/rapl.c
@@ -460,9 +460,16 @@ static struct attribute *rapl_events_cores[] = {
 	NULL,
 };
 
+static umode_t
+rapl_not_visible(struct kobject *kobj, struct attribute *attr, int i)
+{
+	return 0;
+}
+
 static struct attribute_group rapl_events_cores_group = {
 	.name  = "events",
 	.attrs = rapl_events_cores,
+	.is_visible = rapl_not_visible,
 };
 
 static struct attribute *rapl_events_pkg[] = {
@@ -475,6 +482,7 @@ static struct attribute *rapl_events_pkg[] = {
 static struct attribute_group rapl_events_pkg_group = {
 	.name  = "events",
 	.attrs = rapl_events_pkg,
+	.is_visible = rapl_not_visible,
 };
 
 static struct attribute *rapl_events_ram[] = {
@@ -487,6 +495,7 @@ static struct attribute *rapl_events_ram[] = {
 static struct attribute_group rapl_events_ram_group = {
 	.name  = "events",
 	.attrs = rapl_events_ram,
+	.is_visible = rapl_not_visible,
 };
 
 static struct attribute *rapl_events_gpu[] = {
@@ -499,6 +508,7 @@ static struct attribute *rapl_events_gpu[] = {
 static struct attribute_group rapl_events_gpu_group = {
 	.name  = "events",
 	.attrs = rapl_events_gpu,
+	.is_visible = rapl_not_visible,
 };
 
 static struct attribute *rapl_events_psys[] = {
@@ -511,6 +521,7 @@ static struct attribute *rapl_events_psys[] = {
 static struct attribute_group rapl_events_psys_group = {
 	.name  = "events",
 	.attrs = rapl_events_psys,
+	.is_visible = rapl_not_visible,
 };
 
 static bool test_msr(int idx, void *data)

  reply	other threads:[~2020-05-28  6:49 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-27 22:46 [PATCH v2 0/5] perf/x86/rapl: Enable RAPL for AMD Fam17h Stephane Eranian
2020-05-27 22:46 ` [PATCH v2 1/5] perf/x86/rapl: move RAPL support to common x86 code Stephane Eranian
2020-05-28  6:49   ` [tip: perf/core] perf/x86/rapl: Move " tip-bot2 for Stephane Eranian
2020-06-01 12:38   ` [PATCH v2 1/5] perf/x86/rapl: move " Johannes Hirte
2020-06-01 19:46     ` Stephane Eranian
2020-06-04 13:11       ` Johannes Hirte
2020-06-04 15:32         ` Stephane Eranian
2020-05-27 22:46 ` [PATCH v2 2/5] perf/x86/rapl: refactor code for Intel/AMD sharing Stephane Eranian
2020-05-28  6:49   ` [tip: perf/core] perf/x86/rapl: Refactor to share the RAPL code between Intel and AMD CPUs tip-bot2 for Stephane Eranian
2020-05-27 22:46 ` [PATCH v2 3/5] perf/x86/rapl: flip logic on default events visibility Stephane Eranian
2020-05-28  6:49   ` tip-bot2 for Stephane Eranian [this message]
2020-05-27 22:46 ` [PATCH v2 4/5] perf/x86/rapl: make perf_probe_msr() more robust and flexible Stephane Eranian
2020-05-28  6:49   ` [tip: perf/core] perf/x86/rapl: Make " tip-bot2 for Stephane Eranian
2020-05-27 22:46 ` [PATCH v2 5/5] perf/x86/rapl: add AMD Fam17h RAPL support Stephane Eranian
2020-05-28  6:49   ` [tip: perf/core] perf/x86/rapl: Add " tip-bot2 for Stephane Eranian

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