All of lore.kernel.org
 help / color / mirror / Atom feed
From: Taylor Simpson <tsimpson@quicinc.com>
To: tsimpson@quicinc.com
Cc: "open list:All patches CC here" <qemu-devel@nongnu.org>
Subject: [RFC PATCH v5 11/33] Hexagon (target/hexagon) register fields
Date: Thu, 29 Oct 2020 18:58:28 -0500	[thread overview]
Message-ID: <1604015931-23005-12-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1604015931-23005-1-git-send-email-tsimpson@quicinc.com>

Declare bitfields within registers such as user status register (USR)

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
 target/hexagon/reg_fields.h     | 36 ++++++++++++++++++++++++++++++++++++
 target/hexagon/reg_fields_def.h | 41 +++++++++++++++++++++++++++++++++++++++++
 target/hexagon/reg_fields.c     | 27 +++++++++++++++++++++++++++
 3 files changed, 104 insertions(+)
 create mode 100644 target/hexagon/reg_fields.h
 create mode 100644 target/hexagon/reg_fields_def.h
 create mode 100644 target/hexagon/reg_fields.c

diff --git a/target/hexagon/reg_fields.h b/target/hexagon/reg_fields.h
new file mode 100644
index 0000000..4ec7d7c
--- /dev/null
+++ b/target/hexagon/reg_fields.h
@@ -0,0 +1,36 @@
+/*
+ *  Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_REG_FIELDS_H
+#define HEXAGON_REG_FIELDS_H
+
+typedef struct {
+    int offset;
+    int width;
+} RegField;
+
+extern const RegField reg_field_info[];
+
+enum {
+#define DEF_REG_FIELD(TAG, START, WIDTH) \
+    TAG,
+#include "reg_fields_def.h"
+    NUM_REG_FIELDS
+#undef DEF_REG_FIELD
+};
+
+#endif
diff --git a/target/hexagon/reg_fields_def.h b/target/hexagon/reg_fields_def.h
new file mode 100644
index 0000000..27b2231
--- /dev/null
+++ b/target/hexagon/reg_fields_def.h
@@ -0,0 +1,41 @@
+/*
+ *  Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+/*
+ * For registers that have individual fields, explain them here
+ *   DEF_REG_FIELD(tag,
+ *                 bit start offset,
+ *                 width
+ */
+
+/* USR fields */
+DEF_REG_FIELD(USR_OVF,            0, 1)
+DEF_REG_FIELD(USR_FPINVF,         1, 1)
+DEF_REG_FIELD(USR_FPDBZF,         2, 1)
+DEF_REG_FIELD(USR_FPOVFF,         3, 1)
+DEF_REG_FIELD(USR_FPUNFF,         4, 1)
+DEF_REG_FIELD(USR_FPINPF,         5, 1)
+
+DEF_REG_FIELD(USR_LPCFG,          8, 2)
+
+DEF_REG_FIELD(USR_FPRND,         22, 2)
+
+DEF_REG_FIELD(USR_FPINVE,        25, 1)
+DEF_REG_FIELD(USR_FPDBZE,        26, 1)
+DEF_REG_FIELD(USR_FPOVFE,        27, 1)
+DEF_REG_FIELD(USR_FPUNFE,        28, 1)
+DEF_REG_FIELD(USR_FPINPE,        29, 1)
diff --git a/target/hexagon/reg_fields.c b/target/hexagon/reg_fields.c
new file mode 100644
index 0000000..65905d5
--- /dev/null
+++ b/target/hexagon/reg_fields.c
@@ -0,0 +1,27 @@
+/*
+ *  Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "reg_fields.h"
+
+const RegField reg_field_info[] = {
+#define DEF_REG_FIELD(TAG, START, WIDTH)    \
+      { START, WIDTH },
+#include "reg_fields_def.h"
+      { 0, 0 }
+#undef DEF_REG_FIELD
+};
-- 
2.7.4


  parent reply	other threads:[~2020-10-30  0:18 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1604015931-23005-1-git-send-email-tsimpson@quicinc.com>
2020-10-29 23:58 ` [RFC PATCH v5 01/33] Hexagon Update MAINTAINERS file Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 02/33] Hexagon (target/hexagon) README Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 03/33] Hexagon (include/elf.h) ELF machine definition Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 04/33] Hexagon (target/hexagon) scalar core definition Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 05/33] Hexagon (disas) disassembler Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 06/33] Hexagon (target/hexagon) register names Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 07/33] Hexagon (target/hexagon) scalar core helpers Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 08/33] Hexagon (target/hexagon) GDB Stub Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 09/33] Hexagon (target/hexagon) architecture types Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 10/33] Hexagon (target/hexagon) instruction and packet types Taylor Simpson
2020-10-29 23:58 ` Taylor Simpson [this message]
2020-10-29 23:58 ` [RFC PATCH v5 12/33] Hexagon (target/hexagon) instruction attributes Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 13/33] Hexagon (target/hexagon) instruction/packet decode Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 14/33] Hexagon (target/hexagon) instruction printing Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 15/33] Hexagon (target/hexagon/arch.[ch]) utility functions Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 16/33] Hexagon (target/hexagon/conv_emu.[ch]) " Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 17/33] Hexagon (target/hexagon/fma_emu.[ch]) " Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 18/33] Hexagon (target/hexagon/imported) arch import Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 19/33] Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 20/33] Hexagon (target/hexagon) generator phase 2 - generate header files Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 21/33] Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 22/33] Hexagon (target/hexagon) generater phase 4 - " Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 23/33] Hexagon (target/hexagon) opcode data structures Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 24/33] Hexagon (target/hexagon) macros Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 25/33] Hexagon (target/hexagon) instruction classes Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 26/33] Hexagon (target/hexagon) TCG generation Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 27/33] Hexagon (target/hexagon) TCG for instructions with multiple definitions Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 28/33] Hexagon (target/hexagon) TCG for floating point instructions Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 29/33] Hexagon (target/hexagon) translation Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 30/33] Hexagon (linux-user/hexagon) Linux user emulation Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 31/33] Hexagon (tests/tcg/hexagon) TCG tests Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 32/33] Hexagon build infrastructure Taylor Simpson
2020-10-29 23:58 ` [RFC PATCH v5 33/33] Add Dockerfile for hexagon Taylor Simpson
2020-10-30  0:08 [RFC PATCH v5 00/33] Hexagon patch series Taylor Simpson
2020-10-30  0:08 ` [RFC PATCH v5 11/33] Hexagon (target/hexagon) register fields Taylor Simpson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1604015931-23005-12-git-send-email-tsimpson@quicinc.com \
    --to=tsimpson@quicinc.com \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.