From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Ville Syrjala" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: ilk+ wm cleanups
Date: Fri, 30 Oct 2020 18:11:44 -0000 [thread overview]
Message-ID: <160408150412.23388.5042745619165447359@emeril.freedesktop.org> (raw)
In-Reply-To: <20201030165045.5000-1-ville.syrjala@linux.intel.com>
== Series Details ==
Series: drm/i915: ilk+ wm cleanups
URL : https://patchwork.freedesktop.org/series/83289/
State : warning
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/intel_pm.o
In file included from <command-line>:
drivers/gpu/drm/i915/intel_pm.c: In function ‘intel_read_wm_latency’:
./include/linux/bits.h:35:22: error: left shift count >= width of type [-Werror=shift-count-overflow]
(((~UL(0)) - (UL(1) << (l)) + 1) & \
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:46:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
^~~~~~~~~~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:38:31: note: in expansion of macro ‘__GENMASK’
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro ‘GENMASK’
((__type)(GENMASK(__high, __low) + \
^~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro ‘_REG_GENMASK’
#define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low)
^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro ‘REG_GENMASK64’
#define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56)
^~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro ‘SSKPD_NEW_WM0_MASK_HSW’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~~~~~~~~
./include/linux/bits.h:36:11: error: right shift count is negative [-Werror=shift-count-negative]
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:46:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
^~~~~~~~~~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:38:31: note: in expansion of macro ‘__GENMASK’
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro ‘GENMASK’
((__type)(GENMASK(__high, __low) + \
^~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro ‘_REG_GENMASK’
#define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low)
^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro ‘REG_GENMASK64’
#define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56)
^~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro ‘SSKPD_NEW_WM0_MASK_HSW’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~~~~~~~~
./include/linux/bits.h:35:22: error: left shift count >= width of type [-Werror=shift-count-overflow]
(((~UL(0)) - (UL(1) << (l)) + 1) & \
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:48:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG((_mask) == 0, _pfx "mask is zero"); \
^~~~~~~~~~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:38:31: note: in expansion of macro ‘__GENMASK’
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro ‘GENMASK’
((__type)(GENMASK(__high, __low) + \
^~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro ‘_REG_GENMASK’
#define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low)
^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro ‘REG_GENMASK64’
#define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56)
^~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro ‘SSKPD_NEW_WM0_MASK_HSW’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~~~~~~~~
./include/linux/bits.h:36:11: error: right shift count is negative [-Werror=shift-count-negative]
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:48:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG((_mask) == 0, _pfx "mask is zero"); \
^~~~~~~~~~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:38:31: note: in expansion of macro ‘__GENMASK’
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro ‘GENMASK’
((__type)(GENMASK(__high, __low) + \
^~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro ‘_REG_GENMASK’
#define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low)
^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro ‘REG_GENMASK64’
#define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56)
^~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro ‘SSKPD_NEW_WM0_MASK_HSW’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~~~~~~~~
./include/linux/bits.h:35:22: error: left shift count >= width of type [-Werror=shift-count-overflow]
(((~UL(0)) - (UL(1) << (l)) + 1) & \
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:49:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
^~~~~~~~~~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:38:31: note: in expansion of macro ‘__GENMASK’
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro ‘GENMASK’
((__type)(GENMASK(__high, __low) + \
^~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro ‘_REG_GENMASK’
#define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low)
^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro ‘REG_GENMASK64’
#define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56)
^~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro ‘SSKPD_NEW_WM0_MASK_HSW’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~~~~~~~~
./include/linux/bits.h:36:11: error: right shift count is negative [-Werror=shift-count-negative]
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:49:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
^~~~~~~~~~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:38:31: note: in expansion of macro ‘__GENMASK’
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro ‘GENMASK’
((__type)(GENMASK(__high, __low) + \
^~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro ‘_REG_GENMASK’
#define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low)
^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro ‘REG_GENMASK64’
#define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56)
^~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro ‘SSKPD_NEW_WM0_MASK_HSW’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~~~~~~~~
./include/linux/bits.h:35:22: error: left shift count >= width of type [-Werror=shift-count-overflow]
(((~UL(0)) - (UL(1) << (l)) + 1) & \
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:49:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
^~~~~~~~~~~~~~~~
./include/linux/bitfield.h:50:19: note: in expansion of macro ‘__bf_shf’
~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \
^~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:38:31: note: in expansion of macro ‘__GENMASK’
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro ‘GENMASK’
((__type)(GENMASK(__high, __low) + \
^~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro ‘_REG_GENMASK’
#define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low)
^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro ‘REG_GENMASK64’
#define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56)
^~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro ‘SSKPD_NEW_WM0_MASK_HSW’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~~~~~~~~
./include/linux/bits.h:36:11: error: right shift count is negative [-Werror=shift-count-negative]
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:49:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
^~~~~~~~~~~~~~~~
./include/linux/bitfield.h:50:19: note: in expansion of macro ‘__bf_shf’
~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \
^~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:38:31: note: in expansion of macro ‘__GENMASK’
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro ‘GENMASK’
((__type)(GENMASK(__high, __low) + \
^~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro ‘_REG_GENMASK’
#define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low)
^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro ‘REG_GENMASK64’
#define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56)
^~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro ‘SSKPD_NEW_WM0_MASK_HSW’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:50:16: error: right shift count is negative [-Werror=shift-count-negative]
~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:49:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
^~~~~~~~~~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:35:22: error: left shift count >= width of type [-Werror=shift-count-overflow]
(((~UL(0)) - (UL(1) << (l)) + 1) & \
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:52:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull, \
^~~~~~~~~~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:38:31: note: in expansion of macro ‘__GENMASK’
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro ‘GENMASK’
((__type)(GENMASK(__high, __low) + \
^~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro ‘_REG_GENMASK’
#define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low)
^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro ‘REG_GENMASK64’
#define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56)
^~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro ‘SSKPD_NEW_WM0_MASK_HSW’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~~~~~~~~
./include/linux/bits.h:36:11: error: right shift count is negative [-Werror=shift-count-negative]
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:52:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull, \
^~~~~~~~~~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:38:31: note: in expansion of macro ‘__GENMASK’
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro ‘GENMASK’
((__type)(GENMASK(__high, __low) + \
^~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro ‘_REG_GENMASK’
#define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low)
^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:3822:34: note: in expansion of macro ‘REG_GENMASK64’
#define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56)
^~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:27: note: in expansion of macro ‘SSKPD_NEW_WM0_MASK_HSW’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~~~~~~~~
./include/linux/bits.h:35:22: error: left shift count >= width of type [-Werror=shift-count-overflow]
(((~UL(0)) - (UL(1) << (l)) + 1) & \
^~
././include/linux/compiler_types.h:299:9: note: in definition of macro ‘__compiletime_assert’
if (!(condition)) \
^~~~~~~~~
././include/linux/compiler_types.h:319:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:50:2: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
^~~~~~~~~~~~~~~~
./include/linux/build_bug.h:21:2: note: in expansion of macro ‘BUILD_BUG_ON’
BUILD_BUG_ON(((n) & ((n) - 1)) != 0)
^~~~~~~~~~~~
./include/linux/bitfield.h:54:3: note: in expansion of macro ‘__BUILD_BUG_ON_NOT_POWER_OF_2’
__BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
./include/linux/bitfield.h:108:3: note: in expansion of macro ‘__BF_FIELD_CHECK’
__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:184:56: note: in expansion of macro ‘FIELD_GET’
#define _REG_FIELD_GET(__type, __mask, __val) ((__type)FIELD_GET(__mask, __val))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:208:40: note: in expansion of macro ‘_REG_FIELD_GET’
#define REG_FIELD_GET64(__mask, __val) _REG_FIELD_GET(u64, __mask, __val)
^~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_pm.c:2936:11: note: in expansion of macro ‘REG_FIELD_GET64’
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
^~~~~~~~~~~~~~~
./include/linux/bits.h:38:31: note: in expansion of macro ‘__GENMASK’
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:133:12: note: in expansion of macro ‘GENMASK’
((__type)(GENMASK(__high, __low) + \
^~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:160:38: note: in expansion of macro ‘_REG_GENMASK’
#define REG_GENMASK64(__high, __low) _REG_GENMASK(u64, __high, __low)
^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18817/build_32bit.log
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next prev parent reply other threads:[~2020-10-30 18:11 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-30 16:50 [Intel-gfx] [PATCH 00/10] drm/i915: ilk+ wm cleanups Ville Syrjala
2020-10-30 16:50 ` [Intel-gfx] [PATCH 01/10] drm/i915: s/USHRT_MAX/U16_MAX/ Ville Syrjala
2020-10-30 16:50 ` [Intel-gfx] [PATCH 02/10] drm/i915: Shrink ilk-bdw wm storage by using u16 Ville Syrjala
2020-10-30 16:50 ` [Intel-gfx] [PATCH 03/10] drm/i915: Rename ilk watermark structs/enums Ville Syrjala
2020-10-30 16:50 ` [Intel-gfx] [PATCH 04/10] drm/i915: s/dev_priv->wm.hw/&dev_priv->wm.ilk/ Ville Syrjala
2020-10-30 16:50 ` [Intel-gfx] [PATCH 05/10] drm/i915: s/ilk_pipe_wm/ilk_wm_state/ Ville Syrjala
2020-10-30 16:50 ` [Intel-gfx] [PATCH 06/10] drm/i915: Stash away the original SSKPD latency values Ville Syrjala
2020-10-30 16:50 ` [Intel-gfx] [PATCH 07/10] drm/i915: Remove gen6_check_mch_setup() Ville Syrjala
2020-10-30 16:50 ` [Intel-gfx] [PATCH 08/10] drm/i915: Add REG_GENMASK64() and REG_FIELD_GET64() Ville Syrjala
2020-10-30 16:50 ` [Intel-gfx] [PATCH 09/10] drm/i915: Clean up SSKPD/MLTR defines Ville Syrjala
2020-10-30 20:52 ` kernel test robot
2020-10-30 20:52 ` kernel test robot
2020-11-15 10:54 ` kernel test robot
2020-11-15 10:54 ` kernel test robot
2020-10-30 16:50 ` [Intel-gfx] [PATCH 10/10] drm/i915: Polish ilk+ wm regidster bits Ville Syrjala
2020-10-30 17:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: ilk+ wm cleanups Patchwork
2020-10-30 18:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-30 18:11 ` Patchwork [this message]
2020-10-30 22:21 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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