Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/selftests: Exercise relative mmio paths to non-privileged registers

From: Chris Wilson <chris@chris-wilson.co.uk>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/selftests: Exercise relative mmio paths to non-privileged registers
Date: Wed, 20 Jan 2021 09:43:15 +0000	[thread overview]
Message-ID: <161113579581.5143.17048689798317475031@build.alporthouse.com> (raw)
In-Reply-To: <20210119180154.GK21197@mdroper-desk1.amr.corp.intel.com>

Quoting Matt Roper (2021-01-19 18:01:54)
> On Thu, Jan 14, 2021 at 10:38:21AM +0000, Chris Wilson wrote:
> > Verify that context isolation is also preserved when accessing
> > context-local registers with relative-mmio commands.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> >  drivers/gpu/drm/i915/gt/selftest_lrc.c | 88 ++++++++++++++++++++------
> >  1 file changed, 67 insertions(+), 21 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> > index 920979a89413..a55cbf524692 100644
> > --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> > +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> > @@ -911,7 +911,9 @@ create_user_vma(struct i915_address_space *vm, unsigned long size)
> >  }
> >  
> >  static struct i915_vma *
> > -store_context(struct intel_context *ce, struct i915_vma *scratch)
> > +store_context(struct intel_context *ce,
> > +           struct i915_vma *scratch,
> > +           bool relative)
> >  {
> >       struct i915_vma *batch;
> >       u32 dw, x, *cs, *hw;
> > @@ -940,6 +942,9 @@ store_context(struct intel_context *ce, struct i915_vma *scratch)
> >       hw += LRC_STATE_OFFSET / sizeof(*hw);
> >       do {
> >               u32 len = hw[dw] & 0x7f;
> > +             u32 cmd = MI_STORE_REGISTER_MEM_GEN8;
> > +             u32 offset = 0;
> > +             u32 mask = ~0;
> >  
> >               if (hw[dw] == 0) {
> >                       dw++;
> > @@ -951,11 +956,19 @@ store_context(struct intel_context *ce, struct i915_vma *scratch)
> >                       continue;
> >               }
> >  
> > +             if (hw[dw] & MI_LRI_LRM_CS_MMIO) {
> > +                     mask = 0xfff;
> > +                     if (relative)
> > +                             cmd |= MI_LRI_LRM_CS_MMIO;
> > +                     else
> > +                             offset = ce->engine->mmio_base;
> > +             }
> 
> Do we also need to handle bit 17 (MMIO remap) here too?  E.g., a context
> running on a VCS2 engine could have addresses that reference VCS0 if
> this bit is set.

That bit is not used in the context images yet. I hope that is not being
ignored by selftests in the future.

As it stands, the selftests will report the discrepancy if the HW is
using another remap bit.
-Chris
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