From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Aditya Swarup" <aditya.swarup@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Alderlake-S platform enabling patches
Date: Mon, 25 Jan 2021 17:42:08 -0000 [thread overview]
Message-ID: <161159652896.3417.14796348959990973038@emeril.freedesktop.org> (raw)
In-Reply-To: <20210125140753.347998-1-aditya.swarup@intel.com>
== Series Details ==
Series: Alderlake-S platform enabling patches
URL : https://patchwork.freedesktop.org/series/86260/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7d5293a71979 x86/gpu: Add Alderlake-S stolen memory support
9c6ff305711e drm/i915/adl_s: Add PCH support
5f6060c32665 drm/i915/adl_s: Add Interrupt Support
cc0c6ffe9192 drm/i915/adl_s: Add PHYs for Alderlake S
ed39c7a3e949 drm/i915/adl_s: Configure DPLL for ADL-S
bc2af1bd65e7 drm/i915/adl_s: Configure Port clock registers for ADL-S
ffa1c9a2e683 drm/i915/adl_s: Initialize display for ADL-S
d1dd456e53b6 drm/i915/adl_s: Add adl-s ddc pin mapping
7a27ec2a8473 drm/i915/adl_s: Add vbt port and aux channel settings for adls
-:10: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#10:
- ADL-S driver internal mapping uses PORT D, E, F, G for Combo phy B, C, D and E.
total: 0 errors, 1 warnings, 0 checks, 81 lines checked
e081829e52d7 drm/i915/adl_s: Update combo PHY master/slave relationships
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next prev parent reply other threads:[~2021-01-25 17:42 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-25 14:07 [Intel-gfx] [PATCH 00/10] Alderlake-S platform enabling patches Aditya Swarup
2021-01-25 14:07 ` [Intel-gfx] [PATCH 01/10] x86/gpu: Add Alderlake-S stolen memory support Aditya Swarup
2021-01-25 14:07 ` [Intel-gfx] [PATCH 02/10] drm/i915/adl_s: Add PCH support Aditya Swarup
2021-01-25 17:39 ` Lucas De Marchi
2021-01-25 14:07 ` [Intel-gfx] [PATCH 03/10] drm/i915/adl_s: Add Interrupt Support Aditya Swarup
2021-01-25 17:46 ` Lucas De Marchi
2021-01-25 14:07 ` [Intel-gfx] [PATCH 04/10] drm/i915/adl_s: Add PHYs for Alderlake S Aditya Swarup
2021-01-25 17:51 ` Lucas De Marchi
2021-01-25 14:07 ` [Intel-gfx] [PATCH 05/10] drm/i915/adl_s: Configure DPLL for ADL-S Aditya Swarup
2021-01-25 18:45 ` Lucas De Marchi
2021-01-25 14:07 ` [Intel-gfx] [PATCH 06/10] drm/i915/adl_s: Configure Port clock registers " Aditya Swarup
2021-01-25 14:07 ` [Intel-gfx] [PATCH 07/10] drm/i915/adl_s: Initialize display " Aditya Swarup
2021-01-25 18:47 ` Lucas De Marchi
2021-01-25 14:07 ` [Intel-gfx] [PATCH 08/10] drm/i915/adl_s: Add adl-s ddc pin mapping Aditya Swarup
2021-01-25 18:54 ` Lucas De Marchi
2021-01-25 14:07 ` [Intel-gfx] [PATCH 09/10] drm/i915/adl_s: Add vbt port and aux channel settings for adls Aditya Swarup
2021-01-25 14:07 ` [Intel-gfx] [PATCH 10/10] drm/i915/adl_s: Update combo PHY master/slave relationships Aditya Swarup
2021-01-25 17:42 ` Patchwork [this message]
2021-01-25 17:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Alderlake-S platform enabling patches Patchwork
2021-01-25 18:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-25 23:26 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-01-26 0:05 ` Aditya Swarup
2021-01-26 3:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Alderlake-S platform enabling patches (rev2) Patchwork
2021-01-26 3:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-26 3:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-26 10:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-26 15:09 ` [Intel-gfx] [PATCH 00/10] Alderlake-S platform enabling patches Lucas De Marchi
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