From: "tip-bot2 for Samuel Holland" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: stable@vger.kernel.org,
Roman Stratiienko <r.stratiienko@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: timers/core] clocksource/arm_arch_timer: Improve Allwinner A64 timer workaround
Date: Fri, 18 Jun 2021 16:03:36 -0000 [thread overview]
Message-ID: <162403221683.19906.5221093456161398601.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20210515021439.55316-1-samuel@sholland.org>
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 8b33dfe0ba1c84c1aab2456590b38195837f1e6e
Gitweb: https://git.kernel.org/tip/8b33dfe0ba1c84c1aab2456590b38195837f1e6e
Author: Samuel Holland <samuel@sholland.org>
AuthorDate: Fri, 14 May 2021 21:14:39 -05:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Wed, 16 Jun 2021 17:33:04 +02:00
clocksource/arm_arch_timer: Improve Allwinner A64 timer workaround
Bad counter reads are experienced sometimes when bit 10 or greater rolls
over. Originally, testing showed that at least 10 lower bits would be
set to the same value during these bad reads. However, some users still
reported time skips.
Wider testing revealed that on some chips, occasionally only the lowest
9 bits would read as the anomalous value. During these reads (which
still happen only when bit 10), bit 9 would read as the correct value.
Reduce the mask by one bit to cover these cases as well.
Cc: stable@vger.kernel.org
Fixes: c950ca8c35ee ("clocksource/drivers/arch_timer: Workaround for Allwinner A64 timer instability")
Reported-by: Roman Stratiienko <r.stratiienko@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210515021439.55316-1-samuel@sholland.org
---
drivers/clocksource/arm_arch_timer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 89a9e05..be6d741 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -364,7 +364,7 @@ static u64 notrace arm64_858921_read_cntvct_el0(void)
do { \
_val = read_sysreg(reg); \
_retries--; \
- } while (((_val + 1) & GENMASK(9, 0)) <= 1 && _retries); \
+ } while (((_val + 1) & GENMASK(8, 0)) <= 1 && _retries); \
\
WARN_ON_ONCE(!_retries); \
_val; \
prev parent reply other threads:[~2021-06-18 16:03 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-15 2:14 [PATCH] clocksource/arm_arch_timer: Improve Allwinner A64 timer workaround Samuel Holland
2021-05-15 2:14 ` Samuel Holland
2021-06-18 16:03 ` tip-bot2 for Samuel Holland [this message]
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