From: "tip-bot2 for Brijesh Singh" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Tom Lendacky <thomas.lendacky@amd.com>,
Brijesh Singh <brijesh.singh@amd.com>,
Joerg Roedel <jroedel@suse.de>, Borislav Petkov <bp@suse.de>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/sev] x86/sev: Add defines for GHCB version 2 MSR protocol requests
Date: Wed, 23 Jun 2021 13:32:14 -0000 [thread overview]
Message-ID: <162445513402.395.15234934774265504366.tip-bot2@tip-bot2> (raw)
In-Reply-To: <YNLXQIZ5e1wjkshG@8bytes.org>
The following commit has been merged into the x86/sev branch of tip:
Commit-ID: 310f134ed41fcaa03eff302b1e69f1ce1ee21841
Gitweb: https://git.kernel.org/tip/310f134ed41fcaa03eff302b1e69f1ce1ee21841
Author: Brijesh Singh <brijesh.singh@amd.com>
AuthorDate: Wed, 23 Jun 2021 08:40:00 +02:00
Committer: Borislav Petkov <bp@suse.de>
CommitterDate: Wed, 23 Jun 2021 11:25:17 +02:00
x86/sev: Add defines for GHCB version 2 MSR protocol requests
Add the necessary defines for supporting the GHCB version 2 protocol.
This includes defines for:
- MSR-based AP hlt request/response
- Hypervisor Feature request/response
This is the bare minimum of requests that need to be supported by a GHCB
version 2 implementation. There are more requests in the specification,
but those depend on Secure Nested Paging support being available.
These defines are shared between SEV host and guest support.
[ bp: Fold in https://lkml.kernel.org/r/20210622144825.27588-2-joro@8bytes.org too.
Simplify the brewing macro maze into readability. ]
Co-developed-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/YNLXQIZ5e1wjkshG@8bytes.org
---
arch/x86/include/asm/sev-common.h | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h
index 629c3df..2cef6c5 100644
--- a/arch/x86/include/asm/sev-common.h
+++ b/arch/x86/include/asm/sev-common.h
@@ -9,8 +9,13 @@
#define __ASM_X86_SEV_COMMON_H
#define GHCB_MSR_INFO_POS 0
-#define GHCB_MSR_INFO_MASK (BIT_ULL(12) - 1)
+#define GHCB_DATA_LOW 12
+#define GHCB_MSR_INFO_MASK (BIT_ULL(GHCB_DATA_LOW) - 1)
+#define GHCB_DATA(v) \
+ (((unsigned long)(v) & ~GHCB_MSR_INFO_MASK) >> GHCB_DATA_LOW)
+
+/* SEV Information Request/Response */
#define GHCB_MSR_SEV_INFO_RESP 0x001
#define GHCB_MSR_SEV_INFO_REQ 0x002
#define GHCB_MSR_VER_MAX_POS 48
@@ -28,6 +33,7 @@
#define GHCB_MSR_PROTO_MAX(v) (((v) >> GHCB_MSR_VER_MAX_POS) & GHCB_MSR_VER_MAX_MASK)
#define GHCB_MSR_PROTO_MIN(v) (((v) >> GHCB_MSR_VER_MIN_POS) & GHCB_MSR_VER_MIN_MASK)
+/* CPUID Request/Response */
#define GHCB_MSR_CPUID_REQ 0x004
#define GHCB_MSR_CPUID_RESP 0x005
#define GHCB_MSR_CPUID_FUNC_POS 32
@@ -45,6 +51,14 @@
(((unsigned long)reg & GHCB_MSR_CPUID_REG_MASK) << GHCB_MSR_CPUID_REG_POS) | \
(((unsigned long)fn) << GHCB_MSR_CPUID_FUNC_POS))
+/* AP Reset Hold */
+#define GHCB_MSR_AP_RESET_HOLD_REQ 0x006
+#define GHCB_MSR_AP_RESET_HOLD_RESP 0x007
+
+/* GHCB Hypervisor Feature Request/Response */
+#define GHCB_MSR_HV_FT_REQ 0x080
+#define GHCB_MSR_HV_FT_RESP 0x081
+
#define GHCB_MSR_TERM_REQ 0x100
#define GHCB_MSR_TERM_REASON_SET_POS 12
#define GHCB_MSR_TERM_REASON_SET_MASK 0xf
next prev parent reply other threads:[~2021-06-23 13:32 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-22 14:48 [PATCH 0/3] x86/sev: Minor updates for SEV guest support Joerg Roedel
2021-06-22 14:48 ` Joerg Roedel
2021-06-22 14:48 ` [PATCH 1/3] x86/sev: Add Comments to existing GHCB MSR protocol defines Joerg Roedel
2021-06-22 14:48 ` Joerg Roedel
2021-06-22 14:48 ` [PATCH 2/3] x86/sev: Add defines for GHCB version 2 MSR protocol requests Joerg Roedel
2021-06-22 14:48 ` Joerg Roedel
2021-06-22 16:19 ` Tom Lendacky
2021-06-22 16:19 ` Tom Lendacky via Virtualization
2021-06-22 16:34 ` Brijesh Singh
2021-06-22 16:34 ` Brijesh Singh via Virtualization
2021-06-23 6:40 ` Joerg Roedel
2021-06-23 6:40 ` Joerg Roedel
2021-06-23 9:32 ` Borislav Petkov
2021-06-23 9:32 ` Borislav Petkov
2021-06-23 9:49 ` Joerg Roedel
2021-06-23 9:49 ` Joerg Roedel
2021-06-23 12:33 ` Brijesh Singh
2021-06-23 12:33 ` Brijesh Singh via Virtualization
2021-06-23 13:12 ` Tom Lendacky
2021-06-23 13:12 ` Tom Lendacky via Virtualization
2021-06-23 13:32 ` tip-bot2 for Brijesh Singh [this message]
2021-06-22 14:48 ` [PATCH 3/3] x86/sev: Use "SEV: " prefix for messages from sev.c Joerg Roedel
2021-06-22 14:48 ` Joerg Roedel
2021-06-23 13:32 ` [tip: x86/sev] " tip-bot2 for Joerg Roedel
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