From: Stephen Boyd <sboyd@kernel.org>
To: Dinh Nguyen <dinguyen@kernel.org>, linux-clk@vger.kernel.org
Cc: dinguyen@kernel.org, mturquette@baylibre.com, stable@vger.kernel.org
Subject: Re: [PATCHv3 3/4] clk: agilex/stratix10: add support for the 2nd bypass
Date: Sun, 27 Jun 2021 16:41:43 -0700 [thread overview]
Message-ID: <162483730359.3259633.4972546127665365840@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20210611025201.118799-3-dinguyen@kernel.org>
Quoting Dinh Nguyen (2021-06-10 19:52:00)
> The EMAC clocks on Stratix10/Agilex/N5X have an additional bypass that
> was not being accounted for. The bypass selects between
> emaca_clk/emacb_clk and boot_clk.
>
> Because the bypass register offset is different between Stratix10 and
> Agilex/N5X, it's best to create a new function to calculate the bypass.
>
> Fixes: 80c6b7a0894f ("clk: socfpga: agilex: add clock driver for the Agilex platform")
> Cc: stable@vger.kernel.org
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
Applied to clk-next
next prev parent reply other threads:[~2021-06-27 23:41 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-11 2:51 [PATCHv3 1/4] clk: agilex/stratix10: remove noc_clk Dinh Nguyen
2021-06-11 2:51 ` [PATCHv3 2/4] clk: agilex/stratix10: fix bypass representation Dinh Nguyen
2021-06-27 23:41 ` Stephen Boyd
2021-06-11 2:52 ` [PATCHv3 3/4] clk: agilex/stratix10: add support for the 2nd bypass Dinh Nguyen
2021-06-27 23:41 ` Stephen Boyd [this message]
2021-06-11 2:52 ` [PATCHv3 4/4] clk: agilex/stratix10/n5x: fix how the bypass_reg is handled Dinh Nguyen
2021-06-27 23:41 ` Stephen Boyd
2021-06-24 15:45 ` [PATCHv3 1/4] clk: agilex/stratix10: remove noc_clk Dinh Nguyen
2021-06-27 23:41 ` Stephen Boyd
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