From: Stephen Boyd <sboyd@kernel.org>
To: devicetree@vger.kernel.org, gengdongjiu1@gmail.com,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
mturquette@baylibre.com, robh+dt@kernel.org
Cc: Dongjiu Geng <gengdongjiu@huawei.com>
Subject: Re: [PATCH v8 2/2] clk: hisilicon: Add clock driver for hi3559A SoC
Date: Sun, 27 Jun 2021 20:06:30 -0700 [thread overview]
Message-ID: <162484959011.2516444.7382814724138856354@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <1616498973-47067-3-git-send-email-gengdongjiu1@gmail.com>
Quoting Dongjiu Geng (2021-03-23 04:29:33)
> From: Dongjiu Geng <gengdongjiu@huawei.com>
>
> Add clock drivers for hi3559A SoC, this driver
> controls the SoC registers to supply different
> clocks to different IPs in the SoC.
>
> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
> ---
Applied to clk-next
prev parent reply other threads:[~2021-06-28 3:06 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-23 11:29 [PATCH v8 0/2] Enable Hi3559A SOC clock Dongjiu Geng
2021-03-23 11:29 ` [PATCH v8 1/2] dt-bindings: Document the hi3559a clock bindings Dongjiu Geng
2021-06-28 3:05 ` Stephen Boyd
2021-03-23 11:29 ` [PATCH v8 2/2] clk: hisilicon: Add clock driver for hi3559A SoC Dongjiu Geng
2021-06-28 3:06 ` Stephen Boyd [this message]
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