From: Song Gao <gaosong@loongson.cn>
To: qemu-devel@nongnu.org
Cc: Xiaojuan Yang <yangxiaojuan@loongson.cn>,
richard.henderson@linaro.org, laurent@vivier.eu
Subject: [PATCH v13 14/26] target/loongarch: Add floating point load/store instruction translation
Date: Sat, 4 Dec 2021 17:29:13 +0800 [thread overview]
Message-ID: <1638610165-15036-15-git-send-email-gaosong@loongson.cn> (raw)
In-Reply-To: <1638610165-15036-1-git-send-email-gaosong@loongson.cn>
This includes:
- FLD.{S/D}, FST.{S/D}
- FLDX.{S/D}, FSTX.{S/D}
- FLD{GT/LE}.{S/D}, FST{GT/LE}.{S/D}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/loongarch/insn_trans/trans_fmemory.c.inc | 153 ++++++++++++++++++++++++
target/loongarch/insns.decode | 24 ++++
target/loongarch/translate.c | 1 +
3 files changed, 178 insertions(+)
create mode 100644 target/loongarch/insn_trans/trans_fmemory.c.inc
diff --git a/target/loongarch/insn_trans/trans_fmemory.c.inc b/target/loongarch/insn_trans/trans_fmemory.c.inc
new file mode 100644
index 0000000..c9b7c04
--- /dev/null
+++ b/target/loongarch/insn_trans/trans_fmemory.c.inc
@@ -0,0 +1,153 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (c) 2021 Loongson Technology Corporation Limited
+ */
+
+static void maybe_nanbox_load(TCGv freg, MemOp mop)
+{
+ if ((mop & MO_SIZE) == MO_32) {
+ gen_nanbox_s(freg, freg);
+ }
+}
+
+static bool gen_fload_i(DisasContext *ctx, arg_fr_i *a, MemOp mop)
+{
+ TCGv addr = gpr_src(ctx, a->rj, EXT_NONE);
+ TCGv temp = NULL;
+
+ if (a->imm) {
+ temp = tcg_temp_new();
+ tcg_gen_addi_tl(temp, addr, a->imm);
+ addr = temp;
+ }
+
+ tcg_gen_qemu_ld_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
+ maybe_nanbox_load(cpu_fpr[a->fd], mop);
+
+ if (temp) {
+ tcg_temp_free(temp);
+ }
+
+ return true;
+}
+
+static bool gen_fstore_i(DisasContext *ctx, arg_fr_i *a, MemOp mop)
+{
+ TCGv addr = gpr_src(ctx, a->rj, EXT_NONE);
+ TCGv temp = NULL;
+
+ if (a->imm) {
+ temp = tcg_temp_new();
+ tcg_gen_addi_tl(temp, addr, a->imm);
+ addr = temp;
+ }
+
+ tcg_gen_qemu_st_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
+
+ if (temp) {
+ tcg_temp_free(temp);
+ }
+ return true;
+}
+
+static bool gen_floadx(DisasContext *ctx, arg_frr *a, MemOp mop)
+{
+ TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
+ TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
+ TCGv addr = tcg_temp_new();
+
+ tcg_gen_add_tl(addr, src1, src2);
+ tcg_gen_qemu_ld_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
+ maybe_nanbox_load(cpu_fpr[a->fd], mop);
+ tcg_temp_free(addr);
+
+ return true;
+}
+
+static bool gen_fstorex(DisasContext *ctx, arg_frr *a, MemOp mop)
+{
+ TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
+ TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
+ TCGv addr = tcg_temp_new();
+
+ tcg_gen_add_tl(addr, src1, src2);
+ tcg_gen_qemu_st_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
+ tcg_temp_free(addr);
+
+ return true;
+}
+
+static bool gen_fload_gt(DisasContext *ctx, arg_frr *a, MemOp mop)
+{
+ TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
+ TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
+ TCGv addr = tcg_temp_new();
+
+ gen_helper_asrtgt_d(cpu_env, src1, src2);
+ tcg_gen_add_tl(addr, src1, src2);
+ tcg_gen_qemu_ld_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
+ maybe_nanbox_load(cpu_fpr[a->fd], mop);
+ tcg_temp_free(addr);
+
+ return true;
+}
+
+static bool gen_fstore_gt(DisasContext *ctx, arg_frr *a, MemOp mop)
+{
+ TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
+ TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
+ TCGv addr = tcg_temp_new();
+
+ gen_helper_asrtgt_d(cpu_env, src1, src2);
+ tcg_gen_add_tl(addr, src1, src2);
+ tcg_gen_qemu_st_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
+ tcg_temp_free(addr);
+
+ return true;
+}
+
+static bool gen_fload_le(DisasContext *ctx, arg_frr *a, MemOp mop)
+{
+ TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
+ TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
+ TCGv addr = tcg_temp_new();
+
+ gen_helper_asrtle_d(cpu_env, src1, src2);
+ tcg_gen_add_tl(addr, src1, src2);
+ tcg_gen_qemu_ld_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
+ maybe_nanbox_load(cpu_fpr[a->fd], mop);
+ tcg_temp_free(addr);
+
+ return true;
+}
+
+static bool gen_fstore_le(DisasContext *ctx, arg_frr *a, MemOp mop)
+{
+ TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
+ TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE);
+ TCGv addr = tcg_temp_new();
+
+ gen_helper_asrtle_d(cpu_env, src1, src2);
+ tcg_gen_add_tl(addr, src1, src2);
+ tcg_gen_qemu_st_tl(cpu_fpr[a->fd], addr, ctx->mem_idx, mop);
+ tcg_temp_free(addr);
+
+ return true;
+}
+
+TRANS(fld_s, gen_fload_i, MO_TEUL)
+TRANS(fst_s, gen_fstore_i, MO_TEUL)
+TRANS(fld_d, gen_fload_i, MO_TEQ)
+TRANS(fst_d, gen_fstore_i, MO_TEQ)
+TRANS(fldx_s, gen_floadx, MO_TEUL)
+TRANS(fldx_d, gen_floadx, MO_TEQ)
+TRANS(fstx_s, gen_fstorex, MO_TEUL)
+TRANS(fstx_d, gen_fstorex, MO_TEQ)
+TRANS(fldgt_s, gen_fload_gt, MO_TEUL)
+TRANS(fldgt_d, gen_fload_gt, MO_TEQ)
+TRANS(fldle_s, gen_fload_le, MO_TEUL)
+TRANS(fldle_d, gen_fload_le, MO_TEQ)
+TRANS(fstgt_s, gen_fstore_gt, MO_TEUL)
+TRANS(fstgt_d, gen_fstore_gt, MO_TEQ)
+TRANS(fstle_s, gen_fstore_le, MO_TEUL)
+TRANS(fstle_d, gen_fstore_le, MO_TEQ)
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index e9d9a74..c9daa55 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -36,6 +36,8 @@
&fc fd cj
&cr cd rj
&rc rd cj
+&frr fd rj rk
+&fr_i fd rj imm
#
# Formats
@@ -70,6 +72,8 @@
@fc .... ........ ..... ..... .. cj:3 fd:5 &fc
@cr .... ........ ..... ..... rj:5 .. cd:3 &cr
@rc .... ........ ..... ..... .. cj:3 rd:5 &rc
+@frr .... ........ ..... rk:5 rj:5 fd:5 &frr
+@fr_i12 .... ...... imm:s12 rj:5 fd:5 &fr_i
#
# Fixed point arithmetic operation instruction
@@ -388,3 +392,23 @@ movfr2cf 0000 00010001 01001 10100 ..... 00 ... @cf
movcf2fr 0000 00010001 01001 10101 00 ... ..... @fc
movgr2cf 0000 00010001 01001 10110 ..... 00 ... @cr
movcf2gr 0000 00010001 01001 10111 00 ... ..... @rc
+
+#
+# Floating point load/store instruction
+#
+fld_s 0010 101100 ............ ..... ..... @fr_i12
+fst_s 0010 101101 ............ ..... ..... @fr_i12
+fld_d 0010 101110 ............ ..... ..... @fr_i12
+fst_d 0010 101111 ............ ..... ..... @fr_i12
+fldx_s 0011 10000011 00000 ..... ..... ..... @frr
+fldx_d 0011 10000011 01000 ..... ..... ..... @frr
+fstx_s 0011 10000011 10000 ..... ..... ..... @frr
+fstx_d 0011 10000011 11000 ..... ..... ..... @frr
+fldgt_s 0011 10000111 01000 ..... ..... ..... @frr
+fldgt_d 0011 10000111 01001 ..... ..... ..... @frr
+fldle_s 0011 10000111 01010 ..... ..... ..... @frr
+fldle_d 0011 10000111 01011 ..... ..... ..... @frr
+fstgt_s 0011 10000111 01100 ..... ..... ..... @frr
+fstgt_d 0011 10000111 01101 ..... ..... ..... @frr
+fstle_s 0011 10000111 01110 ..... ..... ..... @frr
+fstle_d 0011 10000111 01111 ..... ..... ..... @frr
diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c
index b9cfce5..7b5d1a9 100644
--- a/target/loongarch/translate.c
+++ b/target/loongarch/translate.c
@@ -170,6 +170,7 @@ static void gen_set_gpr(int reg_num, TCGv t, DisasExtend dst_ext)
#include "insn_trans/trans_fcmp.c.inc"
#include "insn_trans/trans_fcnv.c.inc"
#include "insn_trans/trans_fmov.c.inc"
+#include "insn_trans/trans_fmemory.c.inc"
static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
{
--
1.8.3.1
next prev parent reply other threads:[~2021-12-04 9:41 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-04 9:28 [PATCH v13 00/26] Add LoongArch linux-user emulation support Song Gao
2021-12-04 9:29 ` [PATCH v13 01/26] target/loongarch: Add README Song Gao
2021-12-04 9:29 ` [PATCH v13 02/26] target/loongarch: Add core definition Song Gao
2021-12-04 17:26 ` Philippe Mathieu-Daudé
2021-12-06 1:22 ` gaosong
2021-12-06 10:39 ` Philippe Mathieu-Daudé
2021-12-04 9:29 ` [PATCH v13 03/26] target/loongarch: Add main translation routines Song Gao
2021-12-04 9:29 ` [PATCH v13 04/26] target/loongarch: Add fixed point arithmetic instruction translation Song Gao
2021-12-04 9:29 ` [PATCH v13 05/26] target/loongarch: Add fixed point shift " Song Gao
2021-12-04 9:29 ` [PATCH v13 06/26] target/loongarch: Add fixed point bit " Song Gao
2021-12-04 9:29 ` [PATCH v13 07/26] target/loongarch: Add fixed point load/store " Song Gao
2021-12-04 9:29 ` [PATCH v13 08/26] target/loongarch: Add fixed point atomic " Song Gao
2021-12-04 9:29 ` [PATCH v13 09/26] target/loongarch: Add fixed point extra " Song Gao
2021-12-04 9:29 ` [PATCH v13 10/26] target/loongarch: Add floating point arithmetic " Song Gao
2021-12-04 9:29 ` [PATCH v13 11/26] target/loongarch: Add floating point comparison " Song Gao
2021-12-04 9:29 ` [PATCH v13 12/26] target/loongarch: Add floating point conversion " Song Gao
2021-12-04 9:29 ` [PATCH v13 13/26] target/loongarch: Add floating point move " Song Gao
2021-12-04 9:29 ` Song Gao [this message]
2021-12-04 9:29 ` [PATCH v13 15/26] target/loongarch: Add branch " Song Gao
2021-12-04 9:29 ` [PATCH v13 16/26] target/loongarch: Add disassembler Song Gao
2021-12-04 9:29 ` [PATCH v13 17/26] linux-user: Add LoongArch generic header files Song Gao
2021-12-04 17:36 ` Philippe Mathieu-Daudé
2021-12-04 9:29 ` [PATCH v13 18/26] linux-user: Add LoongArch specific structures Song Gao
2021-12-04 9:29 ` [PATCH v13 19/26] linux-user: Add LoongArch signal support Song Gao
2021-12-04 9:29 ` [PATCH v13 20/26] linux-user: Add LoongArch elf support Song Gao
2021-12-04 17:05 ` Philippe Mathieu-Daudé
2021-12-04 9:29 ` [PATCH v13 21/26] linux-user: Add LoongArch syscall support Song Gao
2021-12-04 17:31 ` Philippe Mathieu-Daudé
2021-12-04 9:29 ` [PATCH v13 22/26] linux-user: Add LoongArch cpu_loop support Song Gao
2021-12-04 17:35 ` Philippe Mathieu-Daudé
2021-12-04 9:29 ` [PATCH v13 23/26] default-configs: Add loongarch linux-user support Song Gao
2021-12-04 9:29 ` [PATCH v13 24/26] target/loongarch: Add target build suport Song Gao
2021-12-04 17:33 ` Philippe Mathieu-Daudé
2021-12-04 9:29 ` [PATCH v13 25/26] target/loongarch: 'make check-tcg' support Song Gao
2021-12-04 17:34 ` Philippe Mathieu-Daudé
2021-12-04 9:29 ` [PATCH v13 26/26] scripts: add loongarch64 binfmt config Song Gao
2021-12-16 2:06 ` [PATCH v13 00/26] Add LoongArch linux-user emulation support gaosong
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