From: Michael Ellerman <patch-notifications@ellerman.id.au>
To: Nicholas Piggin <npiggin@gmail.com>, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] powerpc/64s: Mask SRR0 before checking against the masked NIP
Date: Wed, 19 Jan 2022 22:06:04 +1100 [thread overview]
Message-ID: <164259036418.3588160.17517492423330990978.b4-ty@ellerman.id.au> (raw)
In-Reply-To: <20220117134403.2995059-1-npiggin@gmail.com>
On Mon, 17 Jan 2022 23:44:03 +1000, Nicholas Piggin wrote:
> Commit 314f6c23dd8d ("powerpc/64s: Mask NIP before checking against
> SRR0") masked off the low 2 bits of the NIP value in the interrupt
> stack frame in case they are non-zero and mis-compare against a SRR0
> register value of a CPU which always reads back 0 from the 2 low bits
> which are reserved.
>
> This now causes the opposite problem that an implementation which does
> implement those bits in SRR0 will mis-compare against the masked NIP
> value in which they have been cleared. QEMU is one such implementation,
> and this is allowed by the architecture.
>
> [...]
Applied to powerpc/fixes.
[1/1] powerpc/64s: Mask SRR0 before checking against the masked NIP
https://git.kernel.org/powerpc/c/aee101d7b95a03078945681dd7f7ea5e4a1e7686
cheers
prev parent reply other threads:[~2022-01-19 11:07 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-17 13:44 [PATCH] powerpc/64s: Mask SRR0 before checking against the masked NIP Nicholas Piggin
2022-01-19 11:06 ` Michael Ellerman [this message]
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