From: "tip-bot2 for Adrian Hunter" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Adrian Hunter <adrian.hunter@intel.com>,
Borislav Petkov <bp@suse.de>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/misc] perf/tests: Add misc instructions to the x86 instruction decoder test
Date: Sun, 23 Jan 2022 19:44:55 -0000 [thread overview]
Message-ID: <164296709589.16921.8931307392168492759.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20211202095029.2165714-4-adrian.hunter@intel.com>
The following commit has been merged into the x86/misc branch of tip:
Commit-ID: a6ea1142dee66f054a7ce51ebd053ef5ad976227
Gitweb: https://git.kernel.org/tip/a6ea1142dee66f054a7ce51ebd053ef5ad976227
Author: Adrian Hunter <adrian.hunter@intel.com>
AuthorDate: Thu, 02 Dec 2021 11:50:26 +02:00
Committer: Borislav Petkov <bp@suse.de>
CommitterDate: Sun, 23 Jan 2022 20:37:50 +01:00
perf/tests: Add misc instructions to the x86 instruction decoder test
The x86 instruction decoder is used for both kernel instructions and
user space instructions (e.g. uprobes, perf tools Intel PT), so it is
good to update it with new instructions.
Add the following instructions to the x86 instruction decoder test:
User Interrupt
clui
senduipi
stui
testui
uiret
Prediction history reset
hreset
Serialize instruction execution
serialize
TSX suspend load address tracking
xresldtrk
xsusldtrk
A subsequent patch adds the instructions to the instruction decoder.
Reference:
Intel Architecture Instruction Set Extensions and Future Features
Programming Reference
May 2021
Document Number: 319433-044
Example:
$ perf test -v "x86 instruction decoder" |& grep -i hreset
Failed to decode length (4 vs expected 6): f3 0f 3a f0 c0 00 hreset $0x0
Failed to decode length (4 vs expected 6): f3 0f 3a f0 c0 00 hreset $0x0
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Link: https://lore.kernel.org/r/20211202095029.2165714-4-adrian.hunter@intel.com
---
tools/perf/arch/x86/tests/insn-x86-dat-32.c | 8 +++++++-
tools/perf/arch/x86/tests/insn-x86-dat-64.c | 20 +++++++++++++++++-
tools/perf/arch/x86/tests/insn-x86-dat-src.c | 22 +++++++++++++++++++-
3 files changed, 50 insertions(+)
diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-32.c b/tools/perf/arch/x86/tests/insn-x86-dat-32.c
index 9708ae8..79e2050 100644
--- a/tools/perf/arch/x86/tests/insn-x86-dat-32.c
+++ b/tools/perf/arch/x86/tests/insn-x86-dat-32.c
@@ -2197,6 +2197,14 @@
"3e f2 ff 25 78 56 34 12 \tnotrack bnd jmp *0x12345678",},
{{0x3e, 0xf2, 0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "jmp", "indirect",
"3e f2 ff a4 c8 78 56 34 12 \tnotrack bnd jmp *0x12345678(%eax,%ecx,8)",},
+{{0xf3, 0x0f, 0x3a, 0xf0, 0xc0, 0x00, }, 6, 0, "", "",
+"f3 0f 3a f0 c0 00 \threset $0x0",},
+{{0x0f, 0x01, 0xe8, }, 3, 0, "", "",
+"0f 01 e8 \tserialize ",},
+{{0xf2, 0x0f, 0x01, 0xe9, }, 4, 0, "", "",
+"f2 0f 01 e9 \txresldtrk ",},
+{{0xf2, 0x0f, 0x01, 0xe8, }, 4, 0, "", "",
+"f2 0f 01 e8 \txsusldtrk ",},
{{0x0f, 0x01, 0xcf, }, 3, 0, "", "",
"0f 01 cf \tencls ",},
{{0x0f, 0x01, 0xd7, }, 3, 0, "", "",
diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-64.c b/tools/perf/arch/x86/tests/insn-x86-dat-64.c
index 3548565..b2d0ba4 100644
--- a/tools/perf/arch/x86/tests/insn-x86-dat-64.c
+++ b/tools/perf/arch/x86/tests/insn-x86-dat-64.c
@@ -2495,6 +2495,26 @@
"c4 e2 7b 49 c0 \ttilezero %tmm0",},
{{0xc4, 0xe2, 0x7b, 0x49, 0xf8, }, 5, 0, "", "",
"c4 e2 7b 49 f8 \ttilezero %tmm7",},
+{{0xf3, 0x0f, 0x01, 0xee, }, 4, 0, "", "",
+"f3 0f 01 ee \tclui ",},
+{{0xf3, 0x0f, 0xc7, 0xf0, }, 4, 0, "", "",
+"f3 0f c7 f0 \tsenduipi %rax",},
+{{0xf3, 0x41, 0x0f, 0xc7, 0xf0, }, 5, 0, "", "",
+"f3 41 0f c7 f0 \tsenduipi %r8",},
+{{0xf3, 0x0f, 0x01, 0xef, }, 4, 0, "", "",
+"f3 0f 01 ef \tstui ",},
+{{0xf3, 0x0f, 0x01, 0xed, }, 4, 0, "", "",
+"f3 0f 01 ed \ttestui ",},
+{{0xf3, 0x0f, 0x01, 0xec, }, 4, 0, "", "",
+"f3 0f 01 ec \tuiret ",},
+{{0xf3, 0x0f, 0x3a, 0xf0, 0xc0, 0x00, }, 6, 0, "", "",
+"f3 0f 3a f0 c0 00 \threset $0x0",},
+{{0x0f, 0x01, 0xe8, }, 3, 0, "", "",
+"0f 01 e8 \tserialize ",},
+{{0xf2, 0x0f, 0x01, 0xe9, }, 4, 0, "", "",
+"f2 0f 01 e9 \txresldtrk ",},
+{{0xf2, 0x0f, 0x01, 0xe8, }, 4, 0, "", "",
+"f2 0f 01 e8 \txsusldtrk ",},
{{0x0f, 0x01, 0xcf, }, 3, 0, "", "",
"0f 01 cf \tencls ",},
{{0x0f, 0x01, 0xd7, }, 3, 0, "", "",
diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-src.c b/tools/perf/arch/x86/tests/insn-x86-dat-src.c
index 7906f7b..425db6a 100644
--- a/tools/perf/arch/x86/tests/insn-x86-dat-src.c
+++ b/tools/perf/arch/x86/tests/insn-x86-dat-src.c
@@ -1931,6 +1931,15 @@ int main(void)
asm volatile("tilezero %tmm0");
asm volatile("tilezero %tmm7");
+ /* User Interrupt */
+
+ asm volatile("clui");
+ asm volatile("senduipi %rax");
+ asm volatile("senduipi %r8");
+ asm volatile("stui");
+ asm volatile("testui");
+ asm volatile("uiret");
+
#else /* #ifdef __x86_64__ */
/* bound r32, mem (same op code as EVEX prefix) */
@@ -3693,6 +3702,19 @@ int main(void)
#endif /* #ifndef __x86_64__ */
+ /* Prediction history reset */
+
+ asm volatile("hreset $0");
+
+ /* Serialize instruction execution */
+
+ asm volatile("serialize");
+
+ /* TSX suspend load address tracking */
+
+ asm volatile("xresldtrk");
+ asm volatile("xsusldtrk");
+
/* SGX */
asm volatile("encls");
next prev parent reply other threads:[~2022-01-23 19:45 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-02 9:50 [PATCH 0/6] x86/insn: Add instructions to instruction decoder Adrian Hunter
2021-12-02 9:50 ` [PATCH 1/6] perf tests: Add AMX instructions to x86 instruction decoder test Adrian Hunter
2022-01-23 19:44 ` [tip: x86/misc] perf/tests: " tip-bot2 for Adrian Hunter
2021-12-02 9:50 ` [PATCH 2/6] x86/insn: Add AMX instructions to x86 instruction decoder Adrian Hunter
2022-01-23 19:44 ` [tip: x86/misc] x86/insn: Add AMX instructions to the " tip-bot2 for Adrian Hunter
2021-12-02 9:50 ` [PATCH 3/6] perf tests: Add misc instructions to x86 instruction decoder test Adrian Hunter
2022-01-23 19:44 ` tip-bot2 for Adrian Hunter [this message]
2021-12-02 9:50 ` [PATCH 4/6] x86/insn: Add misc instructions to x86 instruction decoder Adrian Hunter
2022-01-23 19:44 ` [tip: x86/misc] " tip-bot2 for Adrian Hunter
2021-12-02 9:50 ` [PATCH 5/6] perf tests: Add AVX512-FP16 instructions to x86 instruction decoder test Adrian Hunter
2022-01-23 19:44 ` [tip: x86/misc] perf/tests: " tip-bot2 for Adrian Hunter
2021-12-02 9:50 ` [PATCH 6/6] x86/insn: Add AVX512-FP16 instructions to x86 instruction decoder Adrian Hunter
2022-01-23 19:44 ` [tip: x86/misc] x86/insn: Add AVX512-FP16 instructions to the " tip-bot2 for Adrian Hunter
2021-12-23 6:38 ` [PATCH 0/6] x86/insn: Add instructions to " Masami Hiramatsu
2022-01-03 8:13 ` Adrian Hunter
2022-01-03 14:56 ` Arnaldo Carvalho de Melo
2022-01-03 15:01 ` Arnaldo Carvalho de Melo
2022-01-03 15:40 ` Adrian Hunter
2022-01-03 18:22 ` Arnaldo Carvalho de Melo
2022-01-03 18:30 ` Arnaldo Carvalho de Melo
2022-01-13 6:52 ` Adrian Hunter
2022-01-13 10:16 ` Borislav Petkov
2022-01-13 10:33 ` Adrian Hunter
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