From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
To: tsbogend@alpha.franken.de, paul@crapouillou.net,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-mips@vger.kernel.org, dongsheng.qiu@ingenic.com,
aric.pzqi@ingenic.com, rick.tyliu@ingenic.com
Subject: [PATCH 1/3] MIPS: Ingenic: Add PWM nodes for X1830.
Date: Fri, 13 May 2022 03:33:39 +0800 [thread overview]
Message-ID: <1652384021-46309-2-git-send-email-zhouyanjie@wanyeetech.com> (raw)
In-Reply-To: <1652384021-46309-1-git-send-email-zhouyanjie@wanyeetech.com>
Add PWM node for X1830 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
arch/mips/boot/dts/ingenic/x1830.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi
index 5aa805a..ffe6073 100644
--- a/arch/mips/boot/dts/ingenic/x1830.dtsi
+++ b/arch/mips/boot/dts/ingenic/x1830.dtsi
@@ -121,6 +121,20 @@
clocks = <&tcu TCU_CLK_WDT>;
clock-names = "wdt";
};
+
+ pwm: pwm@40 {
+ compatible = "ingenic,x1830-pwm", "ingenic,jz4740-pwm";
+ reg = <0x40 0x80>;
+
+ #pwm-cells = <3>;
+
+ clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
+ <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
+ <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
+ <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
+ clock-names = "timer0", "timer1", "timer2", "timer3",
+ "timer4", "timer5", "timer6", "timer7";
+ };
};
rtc: rtc@10003000 {
--
2.7.4
next prev parent reply other threads:[~2022-05-12 19:34 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-12 19:33 [PATCH 0/3] Refresh device tree and defconfig for Ingenic SoCs and boards 周琰杰 (Zhou Yanjie)
2022-05-12 19:33 ` 周琰杰 (Zhou Yanjie) [this message]
2022-05-12 19:33 ` [PATCH 2/3] MIPS: Ingenic: Refresh device tree " 周琰杰 (Zhou Yanjie)
2022-05-12 19:33 ` [PATCH 3/3] MIPS: Ingenic: Refresh defconfig for CU1000-Neo and CU1830-Neo 周琰杰 (Zhou Yanjie)
2022-05-23 9:19 ` [PATCH 0/3] Refresh device tree and defconfig for Ingenic SoCs and boards Thomas Bogendoerfer
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