From: "tip-bot2 for Kan Liang" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Kan Liang <kan.liang@linux.intel.com>,
Ingo Molnar <mingo@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
stable@vger.kernel.org, x86@kernel.org,
linux-kernel@vger.kernel.org
Subject: [tip: perf/urgent] perf/x86/intel: Fix event constraints for ICL
Date: Wed, 25 May 2022 14:03:33 -0000 [thread overview]
Message-ID: <165348741321.4207.8002435699917268067.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20220525133952.1660658-1-kan.liang@linux.intel.com>
The following commit has been merged into the perf/urgent branch of tip:
Commit-ID: 86dca369075b3e310c3c0adb0f81e513c562b5e4
Gitweb: https://git.kernel.org/tip/86dca369075b3e310c3c0adb0f81e513c562b5e4
Author: Kan Liang <kan.liang@linux.intel.com>
AuthorDate: Wed, 25 May 2022 06:39:52 -07:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Wed, 25 May 2022 15:55:52 +02:00
perf/x86/intel: Fix event constraints for ICL
According to the latest event list, the event encoding 0x55
INST_DECODED.DECODERS and 0x56 UOPS_DECODED.DEC0 are only available on
the first 4 counters. Add them into the event constraints table.
Fixes: 6017608936c1 ("perf/x86/intel: Add Icelake support")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220525133952.1660658-1-kan.liang@linux.intel.com
---
arch/x86/events/intel/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 955ae91..45024ab 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -276,7 +276,7 @@ static struct event_constraint intel_icl_event_constraints[] = {
INTEL_EVENT_CONSTRAINT_RANGE(0x03, 0x0a, 0xf),
INTEL_EVENT_CONSTRAINT_RANGE(0x1f, 0x28, 0xf),
INTEL_EVENT_CONSTRAINT(0x32, 0xf), /* SW_PREFETCH_ACCESS.* */
- INTEL_EVENT_CONSTRAINT_RANGE(0x48, 0x54, 0xf),
+ INTEL_EVENT_CONSTRAINT_RANGE(0x48, 0x56, 0xf),
INTEL_EVENT_CONSTRAINT_RANGE(0x60, 0x8b, 0xf),
INTEL_UEVENT_CONSTRAINT(0x04a3, 0xff), /* CYCLE_ACTIVITY.STALLS_TOTAL */
INTEL_UEVENT_CONSTRAINT(0x10a3, 0xff), /* CYCLE_ACTIVITY.CYCLES_MEM_ANY */
prev parent reply other threads:[~2022-05-25 14:07 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-25 13:39 [RESEND PATCH] perf/x86/intel: Update event constraints for ICL kan.liang
2022-05-25 14:03 ` tip-bot2 for Kan Liang [this message]
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