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From: Daniel Vetter <daniel@ffwll.ch>
To: Keith Packard <keithp@keithp.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 12/16] drm/915: fix relaxed tiling on gen2: tile height
Date: Mon, 16 May 2011 19:48:49 +0200	[thread overview]
Message-ID: <20110516174848.GA3506@viiv.ffwll.ch> (raw)
In-Reply-To: <yunliy739tp.fsf@aiko.keithp.com>

On Sun, May 15, 2011 at 02:58:26PM -0700, Keith Packard wrote:
> I have this vague memory of some problem in the past with tiling and old
> user space for Gen2 hardware. I assume that old user space will just do
> bad things, but that there's nothing the kernel can do to fix it, right?

Ok, I'll try to fill you in with a quick summary on this - after all,
we've not only had just one issue with tiling, so it's rather easy to get
lost ;-) Very short answer is "yes".

The tiling height bug (aligning to 8 rows instead of 16) in userspace has
been around forever (as far as I bothered to dig into history, at least).
But that never really showed up because we were rounding up to the next
fence size, which is a pot and at least .5mb (on gen2). So ceil(rows/8)
was never odd, which is the only case this bug manifests. This also wastes
tons of memory, so Chris Wilson developed the relaxed fencing scheme to
avoid allocating unneeded backing storage (and only reserving the full gtt
space if there's a fence attached to the object). Only with support for
relaxed fencing both in the kernel and userspace portion of the driver
could we actually hit the bug. Matters were made worse by our rather large
impedance mismatch between userspace and kernel releases: Distros have
been shipping broken userspace in their stable releases before the kernel
part has hit Linus-mainline (which is when people started to complain, at
around .38-rc6, iirc).

We've tried to detect such underallocated last tile rows in the kernel and
reject such tiling attempts. But libdrm reuses buffers as long as they're
big enough, so the last tile row might intentionally not be complete, but
also never used. We can't tell these two cases apart in the kernel, which
is why we've had to back out that change again and just absorb the
resulting flak.

Aside: I think we need to improve our efforts to make the new patches in
-next testable by the community to decrease that turn-around time mismatch
and catch such issues earlier. I'm tossing around ideas, but nothing
concrete yet.

Yours, Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48

  reply	other threads:[~2011-05-16 17:49 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-05-12 21:17 Select patches for 2.6.40 Chris Wilson
2011-05-12 21:17 ` [PATCH 01/16] drm/i915: Cache GT fifo count for SandyBridge Chris Wilson
2011-05-12 21:17 ` [PATCH 02/16] drm/i915: Refactor pwrite/pread to use single copy of get_user_pages Chris Wilson
2011-05-13  0:21   ` Keith Packard
2011-05-15  8:00     ` Chris Wilson
2011-05-15 15:36       ` Keith Packard
2011-05-12 21:17 ` [PATCH 03/16] drm/i915: s/addr & ~PAGE_MASK/offset_in_page(addr)/ Chris Wilson
2011-05-13  0:26   ` Keith Packard
2011-05-12 21:17 ` [PATCH 04/16] drm/i915: Only print out the actual number of fences for i915_error_state Chris Wilson
2011-05-13  0:28   ` Keith Packard
2011-05-12 21:17 ` [PATCH 05/16] drm/i915/tv: Use a direct pointer for tv_mode Chris Wilson
2011-05-13  0:30   ` Keith Packard
2011-05-12 21:17 ` [PATCH 06/16] drm/i915: Replace ironlake_compute_wm0 with g4x_compute_wm0 Chris Wilson
2011-05-13  0:34   ` Keith Packard
2011-05-13  9:19     ` Chris Wilson
2011-05-13 15:00       ` Keith Packard
2011-05-12 21:17 ` [PATCH 07/16] drm/i915/crt: Explicitly return false if connected to a digital monitor Chris Wilson
2011-05-12 21:17 ` [PATCH 08/16] drm/i915/i2c: Convert from using GMBUS1 + reg_offset idiom to reg + 0 Chris Wilson
2011-05-13  0:36   ` Keith Packard
2011-05-13  0:40   ` Keith Packard
2011-05-13  9:28     ` Chris Wilson
2011-05-13 15:00       ` Keith Packard
2011-06-03 20:55         ` Keith Packard
2011-06-03 23:09           ` Chris Wilson
2011-06-03 23:48             ` Keith Packard
2011-07-13 18:33             ` Keith Packard
2011-07-13 19:22               ` Chris Wilson
2011-05-12 21:17 ` [PATCH 09/16] drm/i915/gmbus: Reset the controller on initialisation Chris Wilson
2011-05-13  0:41   ` Keith Packard
2011-05-13  9:32     ` Chris Wilson
2011-05-13 15:01       ` Keith Packard
2011-05-13 15:53         ` Chris Wilson
2011-06-03 20:56   ` Keith Packard
2011-05-12 21:17 ` [PATCH 10/16] drm/i915: Retire requests before disabling pagefaults Chris Wilson
2011-05-13  1:08   ` Keith Packard
2011-05-12 21:17 ` [PATCH 11/16] drm/i915: not finding a fence is a non-recoverable condition Chris Wilson
2011-05-13  1:10   ` Keith Packard
2011-05-15 20:38     ` Daniel Vetter
2011-05-12 21:17 ` [PATCH 12/16] drm/915: fix relaxed tiling on gen2: tile height Chris Wilson
2011-05-13  1:13   ` Keith Packard
2011-05-15 20:43     ` Daniel Vetter
2011-05-15 21:58       ` Keith Packard
2011-05-16 17:48         ` Daniel Vetter [this message]
2011-05-12 21:17 ` [PATCH 13/16] drm/i915: Remove unused enum "chip_family" Chris Wilson
2011-05-13  1:13   ` Keith Packard
2011-05-12 21:17 ` [PATCH 14/16] drm/i915: Use PCI-ID to identify Broadwater and Crestline Chris Wilson
2011-05-13  1:16   ` Keith Packard
2011-05-13  9:39     ` Chris Wilson
2011-05-15 20:49     ` Daniel Vetter
2011-05-15 22:01       ` Keith Packard
2011-06-03 20:59   ` Keith Packard
2011-05-12 21:17 ` [PATCH 15/16] drm/i915: Convert partial to full CPU read domain if we touch every page Chris Wilson
2011-05-13  1:17   ` Keith Packard
2011-05-12 21:17 ` [PATCH 16/16] drm/i915: Share the common force-audio property between connectors Chris Wilson
2011-05-13  1:21   ` Keith Packard
2011-05-13  3:39 ` Select patches for 2.6.40 Zou, Nanhai

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