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From: "Nadav Har'El" <nyh@il.ibm.com>
To: kvm@vger.kernel.org
Cc: avi@redhat.com
Subject: [PATCH 05/31] nVMX: Introduce vmcs12: a VMCS structure for L1
Date: Wed, 25 May 2011 23:03:55 +0300	[thread overview]
Message-ID: <201105252003.p4PK3tFE011130@rice.haifa.ibm.com> (raw)
In-Reply-To: 1306353651-nyh@il.ibm.com

An implementation of VMX needs to define a VMCS structure. This structure
is kept in guest memory, but is opaque to the guest (who can only read or
write it with VMX instructions).

This patch starts to define the VMCS structure which our nested VMX
implementation will present to L1. We call it "vmcs12", as it is the VMCS
that L1 keeps for its L2 guest. We will add more content to this structure
in later patches.

This patch also adds the notion (as required by the VMX spec) of L1's "current
VMCS", and finally includes utility functions for mapping the guest-allocated
VMCSs in host memory.

Signed-off-by: Nadav Har'El <nyh@il.ibm.com>
---
 arch/x86/kvm/vmx.c |   75 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 75 insertions(+)

--- .before/arch/x86/kvm/vmx.c	2011-05-25 22:40:50.000000000 +0300
+++ .after/arch/x86/kvm/vmx.c	2011-05-25 22:40:50.000000000 +0300
@@ -145,12 +145,53 @@ struct shared_msr_entry {
 };
 
 /*
+ * struct vmcs12 describes the state that our guest hypervisor (L1) keeps for a
+ * single nested guest (L2), hence the name vmcs12. Any VMX implementation has
+ * a VMCS structure, and vmcs12 is our emulated VMX's VMCS. This structure is
+ * stored in guest memory specified by VMPTRLD, but is opaque to the guest,
+ * which must access it using VMREAD/VMWRITE/VMCLEAR instructions.
+ * More than one of these structures may exist, if L1 runs multiple L2 guests.
+ * nested_vmx_run() will use the data here to build a vmcs02: a VMCS for the
+ * underlying hardware which will be used to run L2.
+ * This structure is packed to ensure that its layout is identical across
+ * machines (necessary for live migration).
+ * If there are changes in this struct, VMCS12_REVISION must be changed.
+ */
+struct __packed vmcs12 {
+	/* According to the Intel spec, a VMCS region must start with the
+	 * following two fields. Then follow implementation-specific data.
+	 */
+	u32 revision_id;
+	u32 abort;
+};
+
+/*
+ * VMCS12_REVISION is an arbitrary id that should be changed if the content or
+ * layout of struct vmcs12 is changed. MSR_IA32_VMX_BASIC returns this id, and
+ * VMPTRLD verifies that the VMCS region that L1 is loading contains this id.
+ */
+#define VMCS12_REVISION 0x11e57ed0
+
+/*
+ * VMCS12_SIZE is the number of bytes L1 should allocate for the VMXON region
+ * and any VMCS region. Although only sizeof(struct vmcs12) are used by the
+ * current implementation, 4K are reserved to avoid future complications.
+ */
+#define VMCS12_SIZE 0x1000
+
+/*
  * The nested_vmx structure is part of vcpu_vmx, and holds information we need
  * for correct emulation of VMX (i.e., nested VMX) on this vcpu.
  */
 struct nested_vmx {
 	/* Has the level1 guest done vmxon? */
 	bool vmxon;
+
+	/* The guest-physical address of the current VMCS L1 keeps for L2 */
+	gpa_t current_vmptr;
+	/* The host-usable pointer to the above */
+	struct page *current_vmcs12_page;
+	struct vmcs12 *current_vmcs12;
 };
 
 struct vcpu_vmx {
@@ -231,6 +272,31 @@ static inline struct vcpu_vmx *to_vmx(st
 	return container_of(vcpu, struct vcpu_vmx, vcpu);
 }
 
+static inline struct vmcs12 *get_vmcs12(struct kvm_vcpu *vcpu)
+{
+	return to_vmx(vcpu)->nested.current_vmcs12;
+}
+
+static struct page *nested_get_page(struct kvm_vcpu *vcpu, gpa_t addr)
+{
+	struct page *page = gfn_to_page(vcpu->kvm, addr >> PAGE_SHIFT);
+	if (is_error_page(page)) {
+		kvm_release_page_clean(page);
+		return NULL;
+	}
+	return page;
+}
+
+static void nested_release_page(struct page *page)
+{
+	kvm_release_page_dirty(page);
+}
+
+static void nested_release_page_clean(struct page *page)
+{
+	kvm_release_page_clean(page);
+}
+
 static u64 construct_eptp(unsigned long root_hpa);
 static void kvm_cpu_vmxon(u64 addr);
 static void kvm_cpu_vmxoff(void);
@@ -4038,6 +4104,12 @@ static void free_nested(struct vcpu_vmx 
 	if (!vmx->nested.vmxon)
 		return;
 	vmx->nested.vmxon = false;
+	if (vmx->nested.current_vmptr != -1ull) {
+		kunmap(vmx->nested.current_vmcs12_page);
+		nested_release_page(vmx->nested.current_vmcs12_page);
+		vmx->nested.current_vmptr = -1ull;
+		vmx->nested.current_vmcs12 = NULL;
+	}
 }
 
 /* Emulate the VMXOFF instruction */
@@ -4542,6 +4614,9 @@ static struct kvm_vcpu *vmx_create_vcpu(
 			goto free_vmcs;
 	}
 
+	vmx->nested.current_vmptr = -1ull;
+	vmx->nested.current_vmcs12 = NULL;
+
 	return &vmx->vcpu;
 
 free_vmcs:

  parent reply	other threads:[~2011-05-25 20:03 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-05-25 20:01 [PATCH 0/31] nVMX: Nested VMX, v11 Nadav Har'El
2011-05-25 20:01 ` [PATCH 01/31] nVMX: Keep list of loaded VMCSs, instead of vcpus Nadav Har'El
2011-05-25 20:02 ` [PATCH 02/31] nVMX: Add "nested" module option to kvm_intel Nadav Har'El
2011-05-25 20:02 ` [PATCH 03/31] nVMX: Implement VMXON and VMXOFF Nadav Har'El
2011-05-25 20:03 ` [PATCH 04/31] nVMX: Allow setting the VMXE bit in CR4 Nadav Har'El
2011-05-25 20:03 ` Nadav Har'El [this message]
2011-05-25 20:04 ` [PATCH 06/31] nVMX: Implement reading and writing of VMX MSRs Nadav Har'El
2011-05-25 20:04 ` [PATCH 07/31] nVMX: Decoding memory operands of VMX instructions Nadav Har'El
2011-05-25 20:05 ` [PATCH 08/31] nVMX: Introduce vmcs02: VMCS used to run L2 Nadav Har'El
2011-05-25 20:05 ` [PATCH 09/31] nVMX: Add VMCS fields to the vmcs12 Nadav Har'El
2011-05-25 20:06 ` [PATCH 10/31] nVMX: Success/failure of VMX instructions Nadav Har'El
2011-05-25 20:06 ` [PATCH 11/31] nVMX: Implement VMCLEAR Nadav Har'El
2011-05-25 20:07 ` [PATCH 12/31] nVMX: Implement VMPTRLD Nadav Har'El
2011-05-25 20:08 ` [PATCH 13/31] nVMX: Implement VMPTRST Nadav Har'El
2011-05-25 20:08 ` [PATCH 14/31] nVMX: Implement VMREAD and VMWRITE Nadav Har'El
2011-05-25 20:09 ` [PATCH 15/31] nVMX: Move host-state field setup to a function Nadav Har'El
2011-05-25 20:09 ` [PATCH 16/31] nVMX: Move control field setup to functions Nadav Har'El
2011-05-25 20:10 ` [PATCH 17/31] nVMX: Prepare vmcs02 from vmcs01 and vmcs12 Nadav Har'El
2011-05-25 20:10 ` [PATCH 18/31] nVMX: Implement VMLAUNCH and VMRESUME Nadav Har'El
2011-05-25 20:11 ` [PATCH 19/31] nVMX: No need for handle_vmx_insn function any more Nadav Har'El
2011-05-25 20:11 ` [PATCH 20/31] nVMX: Exiting from L2 to L1 Nadav Har'El
2011-05-25 20:12 ` [PATCH 21/31] nVMX: vmcs12 checks on nested entry Nadav Har'El
2011-05-25 20:12 ` [PATCH 22/31] nVMX: Deciding if L0 or L1 should handle an L2 exit Nadav Har'El
2011-05-25 20:13 ` [PATCH 23/31] nVMX: Correct handling of interrupt injection Nadav Har'El
2011-05-25 20:13 ` [PATCH 24/31] nVMX: Correct handling of exception injection Nadav Har'El
2011-05-25 20:14 ` [PATCH 25/31] nVMX: Correct handling of idt vectoring info Nadav Har'El
2011-05-25 20:14 ` [PATCH 26/31] nVMX: Handling of CR0 and CR4 modifying instructions Nadav Har'El
2011-05-25 20:15 ` [PATCH 27/31] nVMX: Further fixes for lazy FPU loading Nadav Har'El
2011-05-25 20:15 ` [PATCH 28/31] nVMX: Additional TSC-offset handling Nadav Har'El
2011-05-25 20:16 ` [PATCH 29/31] nVMX: Add VMX to list of supported cpuid features Nadav Har'El
2011-05-25 20:16 ` [PATCH 30/31] nVMX: Miscellenous small corrections Nadav Har'El
2011-05-25 20:17 ` [PATCH 31/31] nVMX: Documentation Nadav Har'El
2011-06-01 10:45   ` Jan Kiszka
2011-06-02  8:15     ` Nadav Har'El
2011-06-06  8:36       ` Avi Kivity
2011-05-26  1:30 ` [PATCH 0/31] nVMX: Nested VMX, v11 Tian, Kevin
2011-05-31 18:04 ` Marcelo Tosatti

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