From: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: make sure plane control reg changes take effect
Date: Thu, 28 Jul 2011 11:50:46 -0700 [thread overview]
Message-ID: <20110728115046.3d39ef17@jbarnes-desktop> (raw)
In-Reply-To: <1311878990-10325-1-git-send-email-jbarnes@virtuousgeek.org>
On Thu, 28 Jul 2011 11:49:50 -0700
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> After writing to the plane control reg we need to write to the surface
> reg to trigger the double buffered register latch.
>
> v2: write DSPADDR too to cover pre-965 chipsets
> v3: use flush_display_plane instead, that's what it's for
grumble failing at git right now. Ignore these.
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2011-07-28 18:50 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-28 18:49 [PATCH] drm/i915: make sure plane control reg changes take effect Jesse Barnes
2011-07-28 18:50 ` Jesse Barnes [this message]
-- strict thread matches above, loose matches on Subject: below --
2011-07-28 18:48 Jesse Barnes
2011-07-28 18:46 Jesse Barnes
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