Re: [PATCH] PCI: Quirk for ASUS S3 issue

From: "Rafael J. Wysocki" <rjw@sisk.pl>
To: Alan Stern <stern@rowland.harvard.edu>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	"AceLan Kao" <acelan.kao@canonical.com>,
	linux-pci@vger.kernel.org, " 洪(Alex)茂耕" <alex.hung@canonical.com>
Subject: Re: [PATCH] PCI: Quirk for ASUS S3 issue
Date: Fri, 6 Jul 2012 00:00:51 +0200	[thread overview]
Message-ID: <201207060000.51762.rjw@sisk.pl> (raw)
In-Reply-To: <Pine.LNX.4.44L0.1207051727430.13212-100000@netrider.rowland.org>

On Thursday, July 05, 2012, Alan Stern wrote:
> On Thu, 5 Jul 2012, Bjorn Helgaas wrote:
> 
> > I wish we knew more about what's really going on here.  I looked
> > through the bug reports AceLan dug up, and I don't get the feeling
> > that anybody really has a grand unified theory about why Windows works
> > but Linux doesn't.  But I'm willing to apply one of these patches if
> > you and/or Alan sign off on it.
> 
> His description seems to make sense, even if it may not be complete.
>   
> Windows sets the COMMAND register to 0 before suspending, so it doesn't
> trigger the BIOS bus.  Linux doesn't, so the BIOS tries to quiesce the
> EHCI controller.  This involves doing various MMIO accesses, which of
> course don't work if the controller is already in D3.
> 
> For obvious reasons, I'm in favor of my two-line change over AceLan's
> new PCI quirk.  So far there have been positive responses from a few 
> volunteers testing the patch.

The two-liner is good enough, I think, and tested.  We can always add a quirk
based on it in the future.

Thanks,
Rafael