Re: [PATCH 09/15] drm/i915: hw state readout support for pipe_config->fdi_lanes

From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 09/15] drm/i915: hw state readout support for pipe_config->fdi_lanes
Date: Wed, 24 Apr 2013 14:23:20 +0300	[thread overview]
Message-ID: <20130424112319.GL4469@intel.com> (raw)
In-Reply-To: <1366363487-15926-10-git-send-email-daniel.vetter@ffwll.ch>

On Fri, Apr 19, 2013 at 11:24:41AM +0200, Daniel Vetter wrote:
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 20 ++++++++++++++++++--
>  1 file changed, 18 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 7cb1abf..b7774c1 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5766,9 +5766,13 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
>  	if (!(tmp & PIPECONF_ENABLE))
>  		return false;
>  
> -	if (I915_READ(TRANSCONF(crtc->pipe)) & TRANS_ENABLE)
> +	if (I915_READ(TRANSCONF(crtc->pipe)) & TRANS_ENABLE) {
>  		pipe_config->has_pch_encoder = true;
>  
> +		tmp = I915_READ(FDI_RX_CTL(crtc->pipe));
> +		pipe_config->fdi_lanes = ((tmp >> 19) & 0x3) + 1;

Should we add names for the shifts/mask values? Or maybe we have them
already...

And should we check the TX side too and make sure both sides agree on
the number of lanes?

> +	}
> +
>  	return true;
>  }
>  
> @@ -5905,9 +5909,13 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
>  	 */
>  	tmp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
>  	if ((tmp & TRANS_DDI_PORT_MASK) == TRANS_DDI_SELECT_PORT(PORT_E) &&
> -	    I915_READ(TRANSCONF(PIPE_A)) & TRANS_ENABLE)
> +	    I915_READ(TRANSCONF(PIPE_A)) & TRANS_ENABLE) {
>  		pipe_config->has_pch_encoder = true;
>  
> +		tmp = I915_READ(FDI_RX_CTL(PIPE_A));
> +		pipe_config->fdi_lanes = ((tmp >> 19) & 0x3) + 1;
> +	}
> +
>  	return true;
>  }
>  
> @@ -7869,6 +7877,14 @@ intel_pipe_config_compare(struct intel_crtc_config *current_config,
>  		return false;
>  	}
>  
> +	if (current_config->fdi_lanes != pipe_config->fdi_lanes) {
> +		DRM_ERROR("mismatch in fdi_lanes "
> +			  "(expected %i, found %i)\n",
> +			  current_config->fdi_lanes,
> +			  pipe_config->fdi_lanes);
> +		return false;
> +	}
> +
>  	return true;
>  }
>  
> -- 
> 1.7.11.7
> 
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-- 
Ville Syrjälä
Intel OTC