Re: [PATCH 2/2] drm/i915: enable 30bpp for DP outputs

From: Daniel Vetter <daniel@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: Re: [PATCH 2/2] drm/i915: enable 30bpp for DP outputs
Date: Fri, 7 Jun 2013 07:51:10 +0200	[thread overview]
Message-ID: <20130607055110.GM7827@phenom.ffwll.local> (raw)
In-Reply-To: <1370108756-1948-2-git-send-email-daniel.vetter@ffwll.ch>

On Sat, Jun 01, 2013 at 07:45:56PM +0200, Daniel Vetter wrote:
> We always limited the link bw calculations to 24bpp. Tested with
> my shiny new high-bpc screen, seems to work as advertised.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65280
Tested-by: shui yangwei <yangweix.shui@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index c92eeeb..9868600 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -704,7 +704,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  
>  	/* Walk through all bpp values. Luckily they're all nicely spaced with 2
>  	 * bpc in between. */
> -	bpp = min_t(int, 8*3, pipe_config->pipe_bpp);
> +	bpp = pipe_config->pipe_bpp;
>  	if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp)
>  		bpp = min_t(int, bpp, dev_priv->vbt.edp_bpp);
>  
> -- 
> 1.7.11.7
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch