From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>,
Imre Deak <imre.deak@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 2/2] drm/i915: fix initial timestamps for PP sequencing logic
Date: Wed, 29 Jan 2014 20:47:40 +0100 [thread overview]
Message-ID: <20140129194640.GA11705@phenom.ffwll.local> (raw)
In-Reply-To: <20140129132627.GB28110@nuc-i3427.alporthouse.com>
On Wed, Jan 29, 2014 at 01:26:27PM +0000, Chris Wilson wrote:
> On Wed, Jan 29, 2014 at 01:25:41PM +0200, Imre Deak wrote:
> > The initial jiffies value can be non-0, so set the inital panel power
> > sequencer timestamps accordingly. This didn't cause a problem on 64 bit
> > machines but on 32 bit jiffies is initially -300*HZ, so if the panel
> > power is initally off in the call from edp_panel_vdd_on()->
> > wait_panel_power_cycle() we'd wait up to ~300 sec more than needed.
> >
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
>
> I would have set them all to the same value personally, but
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Both patches merged, thanks.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2014-01-29 19:47 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-29 11:25 [PATCH v2 1/2] drm/i915: fix wait_remaining_ms_from_jiffies Imre Deak
2014-01-29 11:25 ` [PATCH v2 2/2] drm/i915: fix initial timestamps for PP sequencing logic Imre Deak
2014-01-29 13:26 ` Chris Wilson
2014-01-29 19:47 ` Daniel Vetter [this message]
2014-01-29 13:26 ` [PATCH v2 1/2] drm/i915: fix wait_remaining_ms_from_jiffies Chris Wilson
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