From: Mark Brown <broonie@kernel.org>
To: Jie Yang <yang.jie@intel.com>
Cc: mengdong.lin@intel.com, alsa-devel@alsa-project.org,
liam.r.girdwood@intel.com
Subject: Re: [PATCH v2 1/4] ASoC: Intel: Merge wild cat point ADSP DRAM regions
Date: Mon, 14 Jul 2014 19:12:47 +0100 [thread overview]
Message-ID: <20140714181247.GO6800@sirena.org.uk> (raw)
In-Reply-To: <1405329072-28679-2-git-send-email-yang.jie@intel.com>
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On Mon, Jul 14, 2014 at 05:11:09PM +0800, Jie Yang wrote:
> Merge D-SRAM0 D-SRAM1 D-SRAM2 to D-SRAM, for wild cat point ADSP mem regions.
Applied, thanks.
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next prev parent reply other threads:[~2014-07-14 18:13 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-14 9:11 [PATCH v2 0/4] ASoC: Intel: Enable BDW/HSW SRAM power gating Jie Yang
2014-07-14 9:11 ` [PATCH v2 1/4] ASoC: Intel: Merge wild cat point ADSP DRAM regions Jie Yang
2014-07-14 18:12 ` Mark Brown [this message]
2014-07-14 9:11 ` [PATCH v2 2/4] ASoC: Intel: Use a table for ADSP SRAM shift Jie Yang
2014-07-14 18:12 ` Mark Brown
2014-07-14 9:11 ` [PATCH v2 3/4] ASoC: Intel: Add dummy read for SRAM block enable Jie Yang
2014-07-14 18:11 ` Mark Brown
2014-07-14 9:11 ` [PATCH v2 4/4] ASoC: Intel: Start with all memory banks disabled Jie Yang
2014-07-14 18:13 ` Mark Brown
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