From: Thierry Reding <thierry.reding@gmail.com>
To: Philipp Zabel <p.zabel@pengutronix.de>
Cc: patchwork-lst@pengutronix.de, dri-devel@lists.freedesktop.org,
kernel@pengutronix.de
Subject: Re: [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel
Date: Fri, 7 Aug 2015 15:22:55 +0200 [thread overview]
Message-ID: <20150807132254.GA27996@ulmo> (raw)
In-Reply-To: <1438952798.3638.30.camel@pengutronix.de>
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On Fri, Aug 07, 2015 at 03:06:38PM +0200, Philipp Zabel wrote:
> Am Freitag, den 07.08.2015, 14:42 +0200 schrieb Thierry Reding:
> > On Fri, Jun 26, 2015 at 12:27:08PM +0200, Lucas Stach wrote:
> > > From: Philipp Zabel <p.zabel@pengutronix.de>
> > >
> >
> > Can you be more specific here? What kind of bus format is this?
>
> The bus_format contains more information than just the bpc. In this
> case, the SPWG default format for RGB666 via 3-pair LVDS specifies how
> the 18 color bits are serialized in the 7 time slots for each pixel
> clock. See
> http://linuxtv.org/downloads/v4l-dvb-apis/subdev.html#v4l2-mbus-pixelcode-rgb-lvds
> for details.
>
> > Why is it that .bpc = 6 doesn't work here?
>
> In this case a LVDS driver could indeed still decide itself that
> bpc == 6 should be translated to MEDIA_BUS_FMT_RGB666_1X7X3_SPWG (and
> not MEDIA_BUS_FMT_RGB666_1X18, or MEDIA_BUS_FMT_RGB666_1X24_CPADHI, for
> example). But in the bpc == 8 case there are two different standard ways
> to order the bits (SPWG/VESA vs JEIDA).
> For consistency, I'd prefer to set bus_format to the correct value
> everywhere.
Now if we can put that into a commit message, that'd be perfect.
Thierry
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prev parent reply other threads:[~2015-08-07 13:23 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-26 10:27 [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel Lucas Stach
2015-06-26 10:27 ` [PATCH 2/2] drm/panel: correct minimum hsync length of the HannStar HSD070PWW1 panel Lucas Stach
2015-08-07 12:43 ` Thierry Reding
2015-08-07 12:48 ` Lucas Stach
2015-07-23 14:45 ` [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel Lucas Stach
2015-08-07 12:31 ` Lucas Stach
2015-08-07 12:42 ` Thierry Reding
2015-08-07 13:06 ` Philipp Zabel
2015-08-07 13:22 ` Thierry Reding [this message]
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