Re: [PATCHv2 4/4] drm/i915/dp: Enable Upfront link training for typeC DP support on BXT

From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Durgadoss R <durgadoss.r@intel.com>
Cc: ander.conselvan.de.oliveira@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCHv2 4/4] drm/i915/dp: Enable Upfront link training for typeC DP support on BXT
Date: Fri, 12 Feb 2016 19:12:32 +0200	[thread overview]
Message-ID: <20160212171232.GP23290@intel.com> (raw)
In-Reply-To: <1454335073-20405-5-git-send-email-durgadoss.r@intel.com>

On Mon, Feb 01, 2016 at 07:27:53PM +0530, Durgadoss R wrote:
> To support USB type C alternate DP mode, the display driver needs to
> know the number of lanes required by the DP panel as well as number
> of lanes that can be supported by the type-C cable. Sometimes, the
> type-C cable may limit the bandwidth even if Panel can support
> more lanes. To address these scenarios, the display driver will
> start link training with max lanes, and if that fails, the driver
> falls back to x2 lanes; and repeats this procedure for all
> bandwidth/lane configurations.
> 
> * Since link training is done before modeset only the port
>   (and not pipe/planes) and its associated PLLs are enabled.
> * On DP hotplug: Directly start link training on the crtc
>   associated with the DP encoder.
> * On Connected boot scenarios: When booted with an LFP and a DP,
>   typically, BIOS brings up DP. In these cases, we disable the
>   crtc, do upfront link training and then re-enable it back.
> * All local changes made for upfront link training are reset
>   to their previous values once it is done; so that the
>   subsequent modeset is not aware of these changes.

Glancing over this stuff, it doesn't look all that good on the locking
front. Mainly there doesn't seem to locking.

In general I'm not really convinced upfront link training is a very good
idea if it needs a pipe. What happens if we fail to find a free pipe?

I'd be much happier about this if we could make do without a pipe at
least on some modern platforms and actually limit the feature to
those platforms. PLLs are another concern, but I think modern platforms
often have some kind of way to always get the standard DP frequencies
from eg. the LCPLL.

If we do go with the "hope you find a free pipe" approach, then it
really needs to do that atomic locking stuff right. Otherwise I'd expect
fireworks when someone plugs in a display while there's modeset
happening.

-- 
Ville Syrjälä
Intel OTC
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